2018/index.html at gh-pages · BostonArch/2018 · GitHub

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    <title>BARC 2018</title>

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                <li><a href="http://www.bu.edu/barc2015/">2015</a></li>
                <li><a href="http://www.ece.neu.edu/groups/nucar/barc2016/">2016</a></li>
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        <h1>BARC 2018</h1>
        <h2>Boston Area Architecture Workshop</h2>
        <p>Friday, January 26, 2018<br>
           MIT CSAIL<br>
           Bldg 32, Room 141, Cambridge, MA</p>
        <hr>
        <h3>Updates:</h3>

       <p>The <a href='javascript:void(0)' onclick='show_only("program")'>Program</a> is now available.</p>

        <!-- <p>If you have not already registered, please do so as soon as possible: <a href="https://barc2018.eventbrite.com">registration</a></p> -->
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    <!-- Program -->

    <div class="content-section container" id="program">
      <h3>Preliminary Schedule</h3>
      <table class="table table-striped program-table">
        <tr><td><div class="program-time">8:30&ndash;8:50</div></td>
            <td><div class="program-event">Welcome</div></td></tr>
        <!-- Session 1 -->
        <tr><td><div class="program-time">8:50&ndash;9:00</div></td>
            <td><div class="program-author">Parnian Mokri and Mark Hempstead</div><div class="program-title">Detecting Coarse Grained Reconfigurable kernels using ReconfAST</div></td></tr>
        <tr><td><div class="program-time">9:00&ndash;9:20<div class="program-time"></td>
            <td><div class="program-author">Michel Kinsy, Mihailo Isakov, Alan Ehret and Donato Kava</div><div class="program-title">Self-Aware Polymorphic Adaptive (SAPA) Architectures</div></td></tr>
        <tr><td><div class="program-time">9:20&ndash;9:40<div class="program-time"></td>
            <td><div class="program-author">Ayse Coskun, Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Saiful Mojumder and Tiansheng
Zhang</div><div class="program-title">Reclaiming Dark Silicon Using Thermally-Aware Chiplet Organization in 2.5D Integrated Systems</div></td></tr>
        <tr><td><div class="program-time">9:40&ndash;10:00<div class="program-time"></td>
            <td><div class="program-author">Jiwon Choe, Jonathan Lister, R. Iris Bahar, Maurice Herlihy and Tali Moreshet</div><div class="
program-title">Managing Concurrent Data Structures with Processing-In-Memory</div></td></tr>
        <!-- Break -->

        <!-- Break -->
        <tr><td><div class="program-time">10:00&ndash;10:20<div class="program-time"></td>
            <td><div class="program-event">Coffee break</div></td></tr>
        <!-- Session 2 -->
        <tr><td><div class="program-time">10:20&ndash;10:40</div></td>
            <td><div class="program-author">Brandon Reagen, Udit Gupta, Robert Adolf, Michael Mitzenmacher, Alexander Rush, Gu-Yeon Wei and
 David Brooks</div><div class="program-title">Compressing Deep Neural Networks with Probabilistic Data Structures</div></td></tr>
        <tr><td><div class="program-time">10:40&ndash;11:00</div></td>
            <td><div class="program-author">Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy and Ayse Coskun</div><div class="program-title"> An Automated Framework for Memory Allocation in Heterogeneous Memory Systems</div></td></tr>


        <tr><td><div class="program-time">11:00&ndash;11:20<div class="program-time"></td>
            <td><div class="program-author">Michel Kinsy, Miguel Mark, Alan Ehret and Donato Kava</div><div class="program-title">Sphinx: A
 Secure Architecture Based on Binary Code Diversification and Execution Obfuscation</div></td></tr>

        <tr><td><div class="program-time">11:20&ndash;12:00<div class="program-time"></td>
            <td><div class="program-author">Joel Emer, Srini Devadas, Adam Belay, and James Mickens</div><div class="program-title">Invited Panel</div></td></tr>
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        <tr><td><div class="program-time">1:00&ndash;1:20<div class="program-time"></td>
            <td><div class="program-author">Aaron Welch</div><div class="program-title">An overview on the impact of Spectre and Meltdown on ARM</div></td></tr>
        <tr><td><div class="program-time">1:20&ndash;1:40<div class="program-time"></td>
            <td><div class="program-author">
Shankar Viswanathan</div><div class="program-title">
Side Channel attacks on modern hardware
</div></td></tr>
        <tr><td><div class="program-time">1:40&ndash;2:00<div class="program-time"></td>
            <td><div class="program-author">Rohan Garg and Gene Cooperman</div><div class="program-title">Proxies for checkpointing in DMTCP:  Staying close to the Hardware, but not too Close
  (Examples given from GPUs, RDMA networks, and other HPC components)</td></tr>

              <!-- Break -->
        <tr><td><div class="program-time">2:00&ndash;2:20<div class="program-time"></td>
                    <td><div class="program-author">John Leidel</div><div class="program-title">xBGAS: A RISC-V Extension for Datacenter-Scale Addressing</div></td></tr>
        <tr><td><div class="program-time">2:20&ndash;2:40<div class="program-time"></td>
            <td><div class="program-event">Coffee break</div></td></tr>
        <!-- Session 4 -->
        <tr><td><div class="program-time">2:40&ndash;3:00<div class="program-time"></td>
            <td><div class="program-author">
Kaustubh Shivdikar, Kaushal Paneri and David Kaeli</div><div class="program-title">Speeding up DNNs using HPL based Fine-grained Tiling for
 Distributed Multi-GPU Training
</div></td></tr>
        <tr><td><div class="program-time">3:00&ndash;3:20<div class="program-time"></td>
            <td><div class="program-author">
Mihailo Isakov and Michel Kinsy</div><div class="program-title">
Hardware Efficient Sparse Neural Network Training</div></td></tr>
        <tr><td><div class="program-time">3:20&ndash;3:40<div class="program-time"></td>
            <td><div class="program-author">
Babatunde Egbantan, Fritz Previlon and David Kaeli</div><div class="program-title">
Comparing HPC Applications Kernels Vulnerability Using LLFI-GPU</div></td></tr>
        <tr><td><div class="program-time">3:40&ndash;4:00<div class="program-time"></td>
            <td><div class="program-author">
        Rishiyur Nikhil</div><div class="program-title">
The Bluespec RISC-V Verification Factory</div></td></tr>
<tr><td><div class="program-time">4:00&ndash;4:20<div class="program-time"></td>
            <td><div class="program-author">
        Zheming Jin, Kazutomo Yoshii and Hal Finkel</div><div class="program-title">
Understanding How OpenCL Parameters Impact the Performance of Streaming Kernels on FPGA</div></td></tr>
        <!-- Break -->
      </table>
    </div>


    <!-- Registration -->
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      <h2>Registration</h2>
      <p>
      Registration is not required this year.
     <ul>
        <li>Industry participants: FREE (No registration required)</li>
        <li>Academic participants: FREE (No registration required)</li>
       <!--  <li>Students: FREE (Student registrations must be sponsored by a faculty member.)</li>-->
      </ul>
      Registration includes breakfast, light lunch, and coffee during all breaks.
      </p>
      <p>
       <!-- <a href="https://barc2018.eventbrite.com/">Registration site is under construction.</a>-->
      </p>
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    <!-- Call for Abstracts -->
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      <h2>Call for Abstracts</h2>
      <h3>Scope:</h3>
      <p>
        The goal of BARC is to provide a forum for computer architects in the Greater Boston area and beyond to get together and present/discuss the 'latest and greatest' in the area of computer architecture. Papers are being sought on many aspects of computer architecture, including (but not limited to):<br>
        <li>Microarchitecture</li>
        <li>Multicore/manycore processors</li>
        <li>GPUs</li>
        <li>Memory systems</li>
        <li>I/O</li>
        <li>Networking and communication</li>
        <li>Low power</li>
        <li>Adaptive and hybrid systems</li>
        <li>Architectures based on emerging technologies</li>
        <li>Accelerator-based architectures</li>
        <li>Embedded processing</li>
        <li>Performance evaluation techniques</li>
      </p>

      <h3>Important Dates:</h3>
      <p class="plain">
        Deadline Extended <del>January 5, 2018</del><br/>
        Abstract Submission Deadline: January 12, 2018<br/>
        Author Notification: January 15, 2018<br/>
        Workshop Date: Friday, January 26, 2018
      </p>

      </p>

      <h3>Submissions:</h3>
      <p>
        We invite abstracts, two pages or shorter, for consideration for presentation at BARC 2018.  We will also have a session of lightning talks - you should denote a lightning round talk in your title as "Lightning Round".  Authors may present work they have already published elsewhere, or plan to publish in the future.  We welcome participation from those outside of the Greater Boston area.
        <br>
        <br>
        Please submit your abstract (in PDF format) using EasyChair:<br>
        <a href="https://easychair.org/conferences/?conf=barc2018">https://easychair.org/conferences/?conf=barc2018.</a>
        <!-- <a href="https://easychair.org/conferences/?conf=barc2016">https://easychair.org/conferences/?conf=barc2018.</a> -->
        <br>
        <br>
        Abstracts will be accepted for a regular podium presentation or for a poster presentation. All accepted abstracts will be published in the workshop proceedings. <br>Call for Abstracts in <a href="http://soc.mit.edu/BARC2018CFP.pdf">[PDF]</a>
        <br>
        <br>
        For questions, contact <a href="mailto:klk@mit.edu">Kurt Keville</a> or
<a href="mailto:arun@draper.com">
Arun Thomas</a>.
    </p>
    </div>

    <!-- Author Info -->
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    The final manuscripts of all accepted abstracts will be posted on the BARC 2016 website. Please use the following guidelines for preparing the final manuscript:
      <ul>
        <li>Manuscript should be two-pages long.</li>
        <li>Text should use two column format.</li>
        <li>One-inch margin should be left on all sides.</li>
        <li>Using at least a 10-pt font is recommended.</li>
        <li>Submissions should be in PDF format.</li>
      </ul>
      The technical program of BARC 2018 includes both oral presentations and poster presentations. Each oral presentation will be 20 minutes long (including Q&amp;A). Poster authors should print their posters and bring to the workshop. The size of the posters can be up to 8'x4'.
    </div>

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      <h2>Directions</h2>
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      BARC 2018 will be held on the ground floor of the Stata Center, Gates Building at MIT.
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