We have a use case of identifying whether an instr_t is SVE/SVE2.
For x86 DR never had the source ISA release as a first class field and so old tools like drcpusim would figure out SSE vs SSE2 and other categories using helper functions in DR API that list opcodes: e.g., instr_is_sse().
But for AArch64 the ISA feature group is a first class field in the decoder/encoder codec, and I see SVE and SVE2 columns in core/ir/aarch64/codec*.txt.
Presumably there's nowhere in instr_t that holds such a thing, so this would be deduced by doing an encoding walk to find the target template and then grabbing the feature field from the template.
We have a use case of identifying whether an instr_t is SVE/SVE2.
For x86 DR never had the source ISA release as a first class field and so old tools like drcpusim would figure out SSE vs SSE2 and other categories using helper functions in DR API that list opcodes: e.g., instr_is_sse().
But for AArch64 the ISA feature group is a first class field in the decoder/encoder codec, and I see SVE and SVE2 columns in core/ir/aarch64/codec*.txt.
Presumably there's nowhere in instr_t that holds such a thing, so this would be deduced by doing an encoding walk to find the target template and then grabbing the feature field from the template.