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| 1 | +/**************************************************************************** |
| 2 | + * arch/arm/include/ht32f491x3/ht32f491x3_irq.h |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Licensed to the Apache Software Foundation (ASF) under one or more |
| 7 | + * contributor license agreements. See the NOTICE file distributed with |
| 8 | + * this work for additional information regarding copyright ownership. The |
| 9 | + * ASF licenses this file to you under the Apache License, Version 2.0 (the |
| 10 | + * "License"); you may not use this file except in compliance with the |
| 11 | + * License. You may obtain a copy of the License at |
| 12 | + * |
| 13 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 14 | + * |
| 15 | + * Unless required by applicable law or agreed to in writing, software |
| 16 | + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| 17 | + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| 18 | + * License for the specific language governing permissions and limitations |
| 19 | + * under the License. |
| 20 | + * |
| 21 | + ****************************************************************************/ |
| 22 | + |
| 23 | +/* This file should never be included directly but, rather, |
| 24 | + * only indirectly through nuttx/irq.h |
| 25 | + */ |
| 26 | + |
| 27 | +#ifndef __ARCH_ARM_INCLUDE_HT32F491X3_HT32F491X3_IRQ_H |
| 28 | +#define __ARCH_ARM_INCLUDE_HT32F491X3_HT32F491X3_IRQ_H |
| 29 | + |
| 30 | +/**************************************************************************** |
| 31 | + * Included Files |
| 32 | + ****************************************************************************/ |
| 33 | + |
| 34 | +#include <nuttx/config.h> |
| 35 | +#include <nuttx/irq.h> |
| 36 | + |
| 37 | +/**************************************************************************** |
| 38 | + * Pre-processor Definitions |
| 39 | + ****************************************************************************/ |
| 40 | + |
| 41 | +/* External interrupts. These values follow the Holtek CMSIS device header |
| 42 | + * and startup vector table for the HT32F491x3 family. |
| 43 | + */ |
| 44 | + |
| 45 | +#define HT32_IRQ_WWDT (HT32_IRQ_FIRST + 0) |
| 46 | +#define HT32_IRQ_PVM (HT32_IRQ_FIRST + 1) |
| 47 | +#define HT32_IRQ_PVD HT32_IRQ_PVM |
| 48 | +#define HT32_IRQ_TAMP_STAMP (HT32_IRQ_FIRST + 2) |
| 49 | +#define HT32_IRQ_TAMPER HT32_IRQ_TAMP_STAMP |
| 50 | +#define HT32_IRQ_TIMESTAMP HT32_IRQ_TAMP_STAMP |
| 51 | +#define HT32_IRQ_ERTCWAKEUP (HT32_IRQ_FIRST + 3) |
| 52 | +#define HT32_IRQ_FLASH (HT32_IRQ_FIRST + 4) |
| 53 | +#define HT32_IRQ_CRM (HT32_IRQ_FIRST + 5) |
| 54 | +#define HT32_IRQ_EXINT0 (HT32_IRQ_FIRST + 6) |
| 55 | +#define HT32_IRQ_EXINT1 (HT32_IRQ_FIRST + 7) |
| 56 | +#define HT32_IRQ_EXINT2 (HT32_IRQ_FIRST + 8) |
| 57 | +#define HT32_IRQ_EXINT3 (HT32_IRQ_FIRST + 9) |
| 58 | +#define HT32_IRQ_EXINT4 (HT32_IRQ_FIRST + 10) |
| 59 | +#define HT32_IRQ_DMA1CH1 (HT32_IRQ_FIRST + 11) |
| 60 | +#define HT32_IRQ_DMA1CH2 (HT32_IRQ_FIRST + 12) |
| 61 | +#define HT32_IRQ_DMA1CH3 (HT32_IRQ_FIRST + 13) |
| 62 | +#define HT32_IRQ_DMA1CH4 (HT32_IRQ_FIRST + 14) |
| 63 | +#define HT32_IRQ_DMA1CH5 (HT32_IRQ_FIRST + 15) |
| 64 | +#define HT32_IRQ_DMA1CH6 (HT32_IRQ_FIRST + 16) |
| 65 | +#define HT32_IRQ_DMA1CH7 (HT32_IRQ_FIRST + 17) |
| 66 | +#define HT32_IRQ_ADC1 (HT32_IRQ_FIRST + 18) |
| 67 | +#define HT32_IRQ_ADC HT32_IRQ_ADC1 |
| 68 | +#define HT32_IRQ_CAN1TX (HT32_IRQ_FIRST + 19) |
| 69 | +#define HT32_IRQ_CAN1RX0 (HT32_IRQ_FIRST + 20) |
| 70 | +#define HT32_IRQ_CAN1RX1 (HT32_IRQ_FIRST + 21) |
| 71 | +#define HT32_IRQ_CAN1SE (HT32_IRQ_FIRST + 22) |
| 72 | +#define HT32_IRQ_CANSE HT32_IRQ_CAN1SE |
| 73 | +#define HT32_IRQ_EXINT95 (HT32_IRQ_FIRST + 23) |
| 74 | +#define HT32_IRQ_TMR1BRK (HT32_IRQ_FIRST + 24) |
| 75 | +#define HT32_IRQ_TMR9 HT32_IRQ_TMR1BRK |
| 76 | +#define HT32_IRQ_TMR1UP (HT32_IRQ_FIRST + 25) |
| 77 | +#define HT32_IRQ_TMR10 HT32_IRQ_TMR1UP |
| 78 | +#define HT32_IRQ_TMR1TRGCOM (HT32_IRQ_FIRST + 26) |
| 79 | +#define HT32_IRQ_TMR11 HT32_IRQ_TMR1TRGCOM |
| 80 | +#define HT32_IRQ_TMR1CC (HT32_IRQ_FIRST + 27) |
| 81 | +#define HT32_IRQ_TMR2 (HT32_IRQ_FIRST + 28) |
| 82 | +#define HT32_IRQ_TMR3 (HT32_IRQ_FIRST + 29) |
| 83 | +#define HT32_IRQ_TMR4 (HT32_IRQ_FIRST + 30) |
| 84 | +#define HT32_IRQ_I2C1EV (HT32_IRQ_FIRST + 31) |
| 85 | +#define HT32_IRQ_I2C1ERR (HT32_IRQ_FIRST + 32) |
| 86 | +#define HT32_IRQ_I2C2EV (HT32_IRQ_FIRST + 33) |
| 87 | +#define HT32_IRQ_I2C2ERR (HT32_IRQ_FIRST + 34) |
| 88 | +#define HT32_IRQ_SPI1 (HT32_IRQ_FIRST + 35) |
| 89 | +#define HT32_IRQ_SPI2 (HT32_IRQ_FIRST + 36) |
| 90 | +#define HT32_IRQ_USART1 (HT32_IRQ_FIRST + 37) |
| 91 | +#define HT32_IRQ_USART2 (HT32_IRQ_FIRST + 38) |
| 92 | +#define HT32_IRQ_USART3 (HT32_IRQ_FIRST + 39) |
| 93 | +#define HT32_IRQ_EXINT1510 (HT32_IRQ_FIRST + 40) |
| 94 | +#define HT32_IRQ_ERTCALARM (HT32_IRQ_FIRST + 41) |
| 95 | +#define HT32_IRQ_OTGFSWKUP (HT32_IRQ_FIRST + 42) |
| 96 | +#define HT32_IRQ_TMR12 (HT32_IRQ_FIRST + 43) |
| 97 | +#define HT32_IRQ_TMR13 (HT32_IRQ_FIRST + 44) |
| 98 | +#define HT32_IRQ_TMR14 (HT32_IRQ_FIRST + 45) |
| 99 | +#define HT32_IRQ_SPI3 (HT32_IRQ_FIRST + 51) |
| 100 | +#define HT32_IRQ_USART4 (HT32_IRQ_FIRST + 52) |
| 101 | +#define HT32_IRQ_USART5 (HT32_IRQ_FIRST + 53) |
| 102 | +#define HT32_IRQ_TMR6 (HT32_IRQ_FIRST + 54) |
| 103 | +#define HT32_IRQ_DAC HT32_IRQ_TMR6 |
| 104 | +#define HT32_IRQ_TMR7 (HT32_IRQ_FIRST + 55) |
| 105 | +#define HT32_IRQ_DMA2CH1 (HT32_IRQ_FIRST + 56) |
| 106 | +#define HT32_IRQ_DMA2CH2 (HT32_IRQ_FIRST + 57) |
| 107 | +#define HT32_IRQ_DMA2CH3 (HT32_IRQ_FIRST + 58) |
| 108 | +#define HT32_IRQ_DMA2CH4 (HT32_IRQ_FIRST + 59) |
| 109 | +#define HT32_IRQ_DMA2CH5 (HT32_IRQ_FIRST + 60) |
| 110 | +#define HT32_IRQ_CAN2TX (HT32_IRQ_FIRST + 63) |
| 111 | +#define HT32_IRQ_CAN2RX0 (HT32_IRQ_FIRST + 64) |
| 112 | +#define HT32_IRQ_CAN2RX1 (HT32_IRQ_FIRST + 65) |
| 113 | +#define HT32_IRQ_CAN2SE (HT32_IRQ_FIRST + 66) |
| 114 | +#define HT32_IRQ_OTGFS1 (HT32_IRQ_FIRST + 67) |
| 115 | +#define HT32_IRQ_OTGFS HT32_IRQ_OTGFS1 |
| 116 | +#define HT32_IRQ_DMA2CH6 (HT32_IRQ_FIRST + 68) |
| 117 | +#define HT32_IRQ_DMA2CH7 (HT32_IRQ_FIRST + 69) |
| 118 | +#define HT32_IRQ_USART6 (HT32_IRQ_FIRST + 71) |
| 119 | +#define HT32_IRQ_I2C3EV (HT32_IRQ_FIRST + 72) |
| 120 | +#define HT32_IRQ_I2C3ERR (HT32_IRQ_FIRST + 73) |
| 121 | +#define HT32_IRQ_FPU (HT32_IRQ_FIRST + 81) |
| 122 | +#define HT32_IRQ_USART7 (HT32_IRQ_FIRST + 82) |
| 123 | +#define HT32_IRQ_USART8 (HT32_IRQ_FIRST + 83) |
| 124 | +#define HT32_IRQ_DMAMUX (HT32_IRQ_FIRST + 94) |
| 125 | +#define HT32_IRQ_ACC (HT32_IRQ_FIRST + 103) |
| 126 | + |
| 127 | +#define HT32_IRQ_NEXTINT (104) |
| 128 | +#define NR_IRQS (HT32_IRQ_FIRST + HT32_IRQ_NEXTINT) |
| 129 | + |
| 130 | +#endif /* __ARCH_ARM_INCLUDE_HT32F491X3_HT32F491X3_IRQ_H */ |
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