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asymptonicasymptonic
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resolve conflict
2 parents e87dfd9 + 7fcc21b commit c75faed

5 files changed

Lines changed: 27 additions & 57 deletions

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‎BMS/Core/User/Src/FEB_ADBMS6830B_Driver.c‎

Lines changed: 20 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -467,9 +467,10 @@ void ADBMS6830B_rdcfga(uint8_t total_ic, // The number of ICs being written to
467467
memcpy(&(ic[bank].configa.rx_data), ic_data, 6);
468468

469469
/* Calculate PEC for this IC's 6 data bytes */
470-
/* PEC is big-endian: ic_data[6] is MSB, ic_data[7] is LSB */
471-
uint16_t calc_pec = Pec10_calc(false, 6, ic_data);
472-
uint16_t rx_pec = ((uint16_t)ic_data[6] << 8) | ic_data[7];
470+
/* On-wire layout: byte 6 = {CC[5:0], PEC[9:8]}, byte 7 = PEC[7:0].
471+
* Mask 0x03 strips the command counter so only PEC[9:0] is compared. */
472+
uint16_t calc_pec = Pec10_calc(true, 6, ic_data);
473+
uint16_t rx_pec = ((uint16_t)(ic_data[6] & 0x03) << 8) | ic_data[7];
473474
ic[bank].configa.rx_pec_match = (calc_pec != rx_pec) ? 1 : 0;
474475
}
475476

@@ -522,9 +523,10 @@ void ADBMS6830B_rdcfgb(uint8_t total_ic, // The number of ICs being written to
522523
memcpy(&(ic[bank].configb.rx_data), ic_data, 6);
523524

524525
/* Calculate PEC for this IC's 6 data bytes */
525-
/* PEC is big-endian: ic_data[6] is MSB, ic_data[7] is LSB */
526-
uint16_t calc_pec = Pec10_calc(false, 6, ic_data);
527-
uint16_t rx_pec = ((uint16_t)ic_data[6] << 8) | ic_data[7];
526+
/* On-wire layout: byte 6 = {CC[5:0], PEC[9:8]}, byte 7 = PEC[7:0].
527+
* Mask 0x03 strips the command counter so only PEC[9:0] is compared. */
528+
uint16_t calc_pec = Pec10_calc(true, 6, ic_data);
529+
uint16_t rx_pec = ((uint16_t)(ic_data[6] & 0x03) << 8) | ic_data[7];
528530
ic[bank].configb.rx_pec_match = (calc_pec != rx_pec) ? 1 : 0;
529531
}
530532

@@ -648,11 +650,12 @@ uint8_t ADBMS6830B_rdaux(uint8_t total_ic, // The number of ICs in the system
648650
uint8_t *ic_data = cell_data + i * NUM_RX_BYT;
649651
memcpy(&ic[i].aux.a_codes[0], ic_data, 6);
650652

651-
// PEC is big-endian: ic_data[6] is MSB, ic_data[7] is LSB (same layout
652-
// as rdcfga/rdcfgb/rdsid). Record per-IC match so downstream consumers
653-
// like check_and_report_pec_errors() can drive redundancy failover.
654-
uint16_t calc_pec = Pec10_calc(false, 6, ic_data);
655-
uint16_t rx_pec = ((uint16_t)ic_data[6] << 8) | ic_data[7];
653+
// On-wire layout: byte 6 = {CC[5:0], PEC[9:8]}, byte 7 = PEC[7:0].
654+
// Mask 0x03 strips the command counter so only PEC[9:0] is compared.
655+
// Record per-IC match so downstream consumers like
656+
// check_and_report_pec_errors() can drive redundancy failover.
657+
uint16_t calc_pec = Pec10_calc(true, 6, ic_data);
658+
uint16_t rx_pec = ((uint16_t)(ic_data[6] & 0x03) << 8) | ic_data[7];
656659
bool mismatch = (calc_pec != rx_pec);
657660
ic[i].aux.pec_match[0] = mismatch ? 1 : 0;
658661
if (mismatch)
@@ -666,8 +669,8 @@ uint8_t ADBMS6830B_rdaux(uint8_t total_ic, // The number of ICs in the system
666669
uint8_t *ic_data = cell_data + i * NUM_RX_BYT;
667670
memcpy(&ic[i].aux.a_codes[3], ic_data, 6);
668671

669-
uint16_t calc_pec = Pec10_calc(false, 6, ic_data);
670-
uint16_t rx_pec = ((uint16_t)ic_data[6] << 8) | ic_data[7];
672+
uint16_t calc_pec = Pec10_calc(true, 6, ic_data);
673+
uint16_t rx_pec = ((uint16_t)(ic_data[6] & 0x03) << 8) | ic_data[7];
671674
bool mismatch = (calc_pec != rx_pec);
672675
ic[i].aux.pec_match[1] = mismatch ? 1 : 0;
673676
if (mismatch)
@@ -706,9 +709,10 @@ uint8_t ADBMS6830B_rdsid(uint8_t total_ic, // The number of ICs in the system
706709
memcpy(ic[i].sid, ic_data, 6);
707710

708711
// Validate PEC for this IC (6 data bytes + 2 PEC bytes)
709-
// PEC is big-endian: ic_data[6] is MSB, ic_data[7] is LSB
710-
uint16_t calc_pec = Pec10_calc(false, 6, ic_data);
711-
uint16_t rx_pec = ((uint16_t)ic_data[6] << 8) | ic_data[7];
712+
// On-wire layout: byte 6 = {CC[5:0], PEC[9:8]}, byte 7 = PEC[7:0].
713+
// Mask 0x03 strips the command counter so only PEC[9:0] is compared.
714+
uint16_t calc_pec = Pec10_calc(true, 6, ic_data);
715+
uint16_t rx_pec = ((uint16_t)(ic_data[6] & 0x03) << 8) | ic_data[7];
712716
if (calc_pec != rx_pec)
713717
{
714718
pec_error++;

‎BMS/VERSION‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
1.5.3
1+
1.5.5

‎LVPDB/Core/User/Src/FEB_Main.c‎

Lines changed: 4 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,6 @@ static uint8_t uart_tx_buf[4096];
2222
static uint8_t uart_rx_buf[256];
2323

2424
static void FEB_Variable_Conversion(void);
25-
static void FEB_I2C1_Bus_Recovery(void);
2625

2726
/* ============================================================================
2827
* TPS Device Handles and Data
@@ -373,8 +372,10 @@ void FEB_Main_Loop(void)
373372
// FEB_TPS_Enable(tps_handles[5], dash_state.switch1); // AF1_AF2
374373
// FEB_TPS_Enable(tps_handles[6], dash_state.switch2); // CP_RF
375374

376-
HAL_GPIO_WritePin(tps2482_en_ports[4], tps2482_en_pins[4], dash_state.switch2 ? GPIO_PIN_SET : GPIO_PIN_RESET); // AF1_AF2
377-
HAL_GPIO_WritePin(tps2482_en_ports[5], tps2482_en_pins[5], dash_state.switch2 ? GPIO_PIN_SET : GPIO_PIN_RESET); // CP_RF
375+
HAL_GPIO_WritePin(tps2482_en_ports[4], tps2482_en_pins[4],
376+
dash_state.switch2 ? GPIO_PIN_SET : GPIO_PIN_RESET); // AF1_AF2
377+
HAL_GPIO_WritePin(tps2482_en_ports[5], tps2482_en_pins[5],
378+
dash_state.switch2 ? GPIO_PIN_SET : GPIO_PIN_RESET); // CP_RF
378379

379380
// LOG_D("dash_state.switch2 (CP_RF): %u\r\n", dash_state.switch2);
380381

@@ -412,41 +413,6 @@ void FEB_1ms_Callback(void)
412413
}
413414
}
414415

415-
/* ============================================================================
416-
* I2C Bus Recovery
417-
* ============================================================================ */
418-
419-
/**
420-
* Bit-bang up to 9 SCL pulses on PB8/PB9 to free a slave that is holding SDA
421-
* low after an aborted transaction, then issue a manual STOP and re-init the
422-
* I2C peripheral.
423-
*/
424-
static void FEB_I2C1_Bus_Recovery(void)
425-
{
426-
HAL_StatusTypeDef init_st;
427-
GPIO_PinState scl_entry = HAL_GPIO_ReadPin(SCL_GPIO_Port, SCL_Pin);
428-
GPIO_PinState sda_entry = HAL_GPIO_ReadPin(SDA_GPIO_Port, SDA_Pin);
429-
430-
/* The HAL_I2C_DeInit / HAL_I2C_Init dance does not actually reset the I2C
431-
* peripheral's internal logic on STM32F4 — fields like the BUSY flag in
432-
* SR2 can stay latched after a TIMEOUT and corrupt every subsequent
433-
* transaction. Toggling CR1.SWRST is the only thing that clears them.
434-
* Sequence: PE=0 → SWRST=1 (hold) → SWRST=0 → re-init via HAL_I2C_Init. */
435-
436-
__HAL_I2C_DISABLE(&hi2c1);
437-
hi2c1.Instance->CR1 |= I2C_CR1_SWRST;
438-
/* SWRST must be held; a few NOPs is enough but HAL_Delay(1) is safe. */
439-
HAL_Delay(1);
440-
hi2c1.Instance->CR1 &= ~I2C_CR1_SWRST;
441-
442-
/* Force HAL_I2C_Init to redo the full configure path. */
443-
hi2c1.State = HAL_I2C_STATE_RESET;
444-
init_st = HAL_I2C_Init(&hi2c1);
445-
446-
LOG_I(TAG_MAIN, "BusRecovery: entry SCL=%d SDA=%d | SWRST done | Init=%d ErrCode=0x%08lX", (int)scl_entry,
447-
(int)sda_entry, (int)init_st, (unsigned long)hi2c1.ErrorCode);
448-
}
449-
450416
/* ============================================================================
451417
* Data Conversion and Filtering
452418
* ============================================================================ */

‎LVPDB/VERSION‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
1.5.5
1+
1.5.7

‎VERSION‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
1.5.5
1+
1.5.9

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