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| 1 | +/* |
| 2 | + * Copyright (c) 2019-2025 Kim Jørgensen and Sven Oliver (SvOlli) Moll |
| 3 | + * Copyright (c) 2024 Vladan Nikolic |
| 4 | + * |
| 5 | + * This software is provided 'as-is', without any express or implied |
| 6 | + * warranty. In no event will the authors be held liable for any damages |
| 7 | + * arising from the use of this software. |
| 8 | + * |
| 9 | + * Permission is granted to anyone to use this software for any purpose, |
| 10 | + * including commercial applications, and to alter it and redistribute it |
| 11 | + * freely, subject to the following restrictions: |
| 12 | + * |
| 13 | + * 1. The origin of this software must not be misrepresented; you must not |
| 14 | + * claim that you wrote the original software. If you use this software |
| 15 | + * in a product, an acknowledgment in the product documentation would be |
| 16 | + * appreciated but is not required. |
| 17 | + * 2. Altered source versions must be plainly marked as such, and must not be |
| 18 | + * misrepresented as being the original software. |
| 19 | + * 3. This notice may not be removed or altered from any source distribution. |
| 20 | + */ |
| 21 | + |
| 22 | +/* |
| 23 | + * The Ross cartridge supports 16 kb, 32 kb, and 64 kb ROM |
| 24 | + * |
| 25 | + * Any read or write to $DE00-$DEFF will switch banks |
| 26 | + * Any read or write to $DF00-$DFFF turns ROM off |
| 27 | + * |
| 28 | + * See https://github.com/msolajic/EX-YU_64K_C64_CART for more details |
| 29 | + */ |
| 30 | + |
| 31 | +static u32 ross_bank; |
| 32 | + |
| 33 | +/************************************************* |
| 34 | +* C64 bus read callback |
| 35 | +*************************************************/ |
| 36 | +FORCE_INLINE bool ross_read_handler(u32 control, u32 addr) |
| 37 | +{ |
| 38 | + if ((control & (C64_ROML|C64_ROMH)) != (C64_ROML|C64_ROMH)) |
| 39 | + { |
| 40 | + C64_DATA_WRITE(crt_ptr[addr & 0x3fff]); |
| 41 | + return true; |
| 42 | + } |
| 43 | + |
| 44 | + if (!(control & C64_IO1)) |
| 45 | + { |
| 46 | + // Any read to IO1: Switch bank |
| 47 | + crt_ptr = crt_banks[ross_bank & 0x03]; |
| 48 | + ross_bank >>= 2; |
| 49 | + return false; |
| 50 | + } |
| 51 | + |
| 52 | + if (!(control & C64_IO2)) |
| 53 | + { |
| 54 | + // Any read to IO2: Disable ROM |
| 55 | + C64_CRT_CONTROL(STATUS_LED_OFF|CRT_PORT_NONE); |
| 56 | + return false; |
| 57 | + } |
| 58 | + |
| 59 | + return false; |
| 60 | +} |
| 61 | + |
| 62 | +/************************************************* |
| 63 | +* C64 bus write callback |
| 64 | +*************************************************/ |
| 65 | +FORCE_INLINE void ross_write_handler(u32 control, u32 addr, u32 data) |
| 66 | +{ |
| 67 | + if (!(control & C64_IO1)) |
| 68 | + { |
| 69 | + // Any write to IO1: Switch bank |
| 70 | + crt_ptr = crt_banks[ross_bank & 0x03]; |
| 71 | + ross_bank >>= 2; |
| 72 | + return; |
| 73 | + } |
| 74 | + |
| 75 | + if (!(control & C64_IO2)) |
| 76 | + { |
| 77 | + // Any write to IO2: Disable ROM |
| 78 | + C64_CRT_CONTROL(STATUS_LED_OFF|CRT_PORT_NONE); |
| 79 | + return; |
| 80 | + } |
| 81 | +} |
| 82 | + |
| 83 | +static void ross_init(DAT_CRT_HEADER *crt_header) |
| 84 | +{ |
| 85 | + if (crt_header->banks <= 1) |
| 86 | + { |
| 87 | + // 16 kb cartridge - no bank switching |
| 88 | + ross_bank = 0; |
| 89 | + } |
| 90 | + else if (crt_header->banks == 2) |
| 91 | + { |
| 92 | + // 32 kb cartridge - 2 banks |
| 93 | + ross_bank = (1 << 4) | (0 << 2) | (1 << 0); |
| 94 | + } |
| 95 | + else |
| 96 | + { |
| 97 | + // 64 kb cartridge - 4 banks |
| 98 | + ross_bank = (3 << 4) | (2 << 2) | (1 << 0); |
| 99 | + } |
| 100 | +} |
| 101 | + |
| 102 | +C64_BUS_HANDLER(ross) |
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