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Merge pull request #83 from LouDnl/dev
Dev v0.6.3-BETA
2 parents 847339a + b3f7ea2 commit e4de4ac

28 files changed

Lines changed: 1334 additions & 772 deletions

CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ set(PROJECT_NAME usbsidpico)
3030
set(PROJECT_MANUFACTURER "LouD")
3131
set(PRODUCT_STRING "USBSID-Pico")
3232
string(TIMESTAMP MAGIC_SMOKE "%Y%m%d") # Auto generate dated version
33-
set(PROJECT_VERSION "0.6.2-BETA.${MAGIC_SMOKE}") # Generate compile version
33+
set(PROJECT_VERSION "0.6.3-BETA.${MAGIC_SMOKE}") # Generate compile version
3434

3535
### Want a cookie?
3636
# NOTICE: ENABLING THESE DEBUGGING DEFINITIONS WILL HAVE SIGNIFICANT IMPACT AND WILL DELAY PLAYING!

src/asid_buffer.c

Lines changed: 16 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -54,41 +54,41 @@ extern Config usbsid_config;
5454
extern uint32_t clockcycles(void);
5555

5656
/* PIO */
57-
PIO raster_pio = pio1;
57+
const PIO raster_pio = pio1;
5858
static uint sm_buffer, offset_buffer;
59-
bool buffer_sm_started = false;
60-
bool buffer_sm_claimed = false;
59+
static bool buffer_sm_started = false;
60+
static bool buffer_sm_claimed = false;
6161

6262
/* Arrival rate tracking */
6363
#define ARRIVAL_HISTORY_SIZE 8
6464
#define MULTISID_TIMEOUT_FRAMES 30 /* Reset to 1-SID after this many frames without SID2+ */
6565
#define NOWRITES_TIMEOUT_FRAMES 100 /* Disable everything after this amount of frames */
6666

67-
static bool still_receiving = false;
67+
static bool still_receiving = false; /* IRQ */
6868
static uint32_t arrival_times[ARRIVAL_HISTORY_SIZE];
6969
volatile uint8_t arrival_index = 0;
7070
volatile uint8_t arrival_count = 0;
7171
volatile uint32_t calculated_rate = 0;
72-
static uint16_t base_rate = 0; /* The rate from env message */
73-
static uint8_t sid_count_estimate = 1; /* Estimated number of SIDs in tune */
74-
volatile /* static */ uint8_t frames_since_nowrites = 0; /* Frames since last SID2/3/4 message */
75-
static uint8_t frames_since_multisid = 0; /* Frames since last SID2/3/4 message */
72+
volatile static uint16_t base_rate = 0; /* The rate from env message */
73+
volatile static uint8_t sid_count_estimate = 1; /* Estimated number of SIDs in tune */
74+
volatile uint8_t frames_since_nowrites = 0; /* Frames since last SID2/3/4 message */
75+
volatile static uint8_t frames_since_multisid = 0; /* Frames since last SID2/3/4 message */
7676

7777
/* IRQ */
78-
int pio_irq;
79-
static int8_t buffer_irq;
8078
const int BUFFPIOIRQ = 2;
81-
bool buffer_irq_started = false;
79+
volatile static int pio_irq = 0;
80+
volatile static int8_t buffer_irq = 0;
81+
volatile static bool buffer_irq_started = false;
8282
volatile uint32_t irq_now_at = 0;
8383
volatile uint32_t irq_end_at = 0;
8484
volatile uint32_t irq_prev_at = 0;
8585

8686
/* Ring buffer */
87-
static const uint8_t ASID_FRAME_WRITES_MAX = 28;
8887
static uint8_t ring_get(void);
8988
static int ring_diff(void);
89+
static const uint8_t ASID_FRAME_WRITES_MAX = 28;
9090
volatile uint16_t corrected_rate = 0;
91-
uint8_t diff_size = (2 * (4 * ASID_FRAME_WRITES_MAX)); /* = 224 bytes | 112 bytes == 1 frame, was 64 bytes */
91+
const uint8_t diff_size = (2 * (4 * ASID_FRAME_WRITES_MAX)); /* = 224 bytes | 112 bytes == 1 frame, was 64 bytes */
9292
typedef struct {
9393
uint16_t ring_read;
9494
uint16_t ring_write;
@@ -104,8 +104,6 @@ static const uint16_t RING_SIZE_MAX = (150 * 224); /* 33600 bytes - maximum s
104104
static const uint16_t RING_SIZE_STEP = (20 * 224); /* 4480 bytes - grow/shrink increment */
105105
volatile uint16_t ring_size = RING_SIZE_DEFAULT; /* Current effective size */
106106
static uint16_t ring_size_allocated = 0; /* Actual allocated size */
107-
/* TODO: REMOVE ~ TEMPORARY */
108-
volatile bool in_asid_irq = false;
109107

110108

111109
/**
@@ -430,7 +428,6 @@ void reset_arrival_tracking(void)
430428
*/
431429
void __not_in_flash_func(buffer_irq_handler)(void)
432430
{
433-
in_asid_irq = true;
434431
irq_prev_at = irq_now_at;
435432
irq_now_at = clockcycles();
436433

@@ -478,7 +475,6 @@ void __not_in_flash_func(buffer_irq_handler)(void)
478475
frames_since_nowrites = 0;
479476
still_receiving = true;
480477
}
481-
in_asid_irq = false;
482478

483479
/* Interrupt cleared at end of routine
484480
* if play becomes irregular, irq's might be
@@ -668,6 +664,9 @@ static uint8_t __not_in_flash_func(ring_get)(void)
668664
*/
669665
void asid_ring_init(void)
670666
{
667+
/* Explicitely set sid_count_estimate to 1 at start for potential compiler zeroing issue */
668+
sid_count_estimate = 1;
669+
671670
if (!asid_ringbuffer.is_allocated) {
672671
if (asid_ringbuffer.ringbuffer != NULL) { free(asid_ringbuffer.ringbuffer); }
673672
/* Allocate max size upfront - allows growth without reallocation */

src/bus.c

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -65,12 +65,13 @@ extern void stop_pios(void);
6565
volatile bool is_muted; /* Global muting state */
6666

6767
/* Direct Pio IRQ access */
68-
volatile const uint32_t *IRQState = &pio0_hw->irq;
68+
#define IRQState (pio0_hw->irq)
6969

7070
/* DMA bus data variables */
71-
uint8_t control_word, read_data;
72-
uint16_t delay_word;
73-
uint32_t data_word, dir_mask;
71+
volatile uint8_t control_word, read_data;
72+
volatile uint16_t delay_word;
73+
volatile uint32_t data_word, dir_mask;
74+
7475

7576
/**
7677
* @brief Set the bits going to the PIO databus based on provided address
@@ -197,13 +198,14 @@ uint16_t __no_inline_not_in_flash_func(cycled_delay_operation)(uint16_t cycles)
197198
pio_sm_exec(bus_pio, sm_delay, pio_encode_irq_clear(false, PIO_IRQ0)); /* Clear the statemachine IRQ before starting */
198199
pio_sm_exec(bus_pio, sm_delay, pio_encode_irq_clear(false, PIO_IRQ1)); /* Clear the statemachine IRQ before starting */
199200
dma_channel_set_read_addr(dma_tx_delay, &delay_word, false);
200-
dma_hw->multi_channel_trigger = (1u << dma_tx_delay); /* Delay cycle s DMA transfer */
201+
dma_channel_set_trans_count(dma_tx_delay, 1, false); /* Reset transfer count to 1 */
202+
dma_hw->multi_channel_trigger = (1u << dma_tx_delay); /* Delay cycles DMA transfer */
201203

202204
for (;;) { /* Keep mofo waiting yeah! */
203-
if (((*IRQState & (1u << PIO_IRQ1)) >> PIO_IRQ1) != 1)
205+
if (((IRQState & (1u << PIO_IRQ1)) >> PIO_IRQ1) != 1)
204206
continue;
205-
pio_sm_exec(bus_pio, sm_delay, pio_encode_irq_clear(false, PIO_IRQ0)); /* Clear the statemachine IRQ after finishing */
206-
pio_sm_exec(bus_pio, sm_delay, pio_encode_irq_clear(false, PIO_IRQ1)); /* Clear the statemachine IRQ after finishing */
207+
/* Clear the statemachine IRQ after finishing */
208+
IRQState = (1u << PIO_IRQ0) | (1u << PIO_IRQ1); /* Write-1-to-Clear to clear both flags */
207209
return cycles;
208210
}
209211

@@ -312,8 +314,8 @@ uint16_t __no_inline_not_in_flash_func(cycled_delayed_write_operation)(uint8_t a
312314
void __no_inline_not_in_flash_func(cycled_write_operation)(uint8_t address, uint8_t data, uint16_t cycles)
313315
{
314316
delay_word = cycles;
315-
sid_memory[(address & 0x7F)] = data;
316-
if (set_bus_bits(address, true) != 1) {
317+
sid_memory[(address & 0x7F)] = data; /* Store SID write data in SID memory */
318+
if (set_bus_bits(address, true) != 1) { /* Set bus bits (uses SID memory as source) */
317319
return;
318320
}
319321

@@ -371,7 +373,7 @@ uint8_t __no_inline_not_in_flash_func(cycled_read_operation)(uint8_t address, ui
371373
);
372374
dma_channel_wait_for_finish_blocking(dma_rx_data); /* Wait for data */
373375
sid_memory[(address & 0x7F)] = (read_data & 0xFF);
374-
return (read_data & 0xFF);
376+
return sid_memory[(address & 0x7F)];
375377
}
376378

377379
/**

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