fix(llc): correct reflected output voltage for voltage-doubler rectifier

For VOLTAGE_DOUBLER, the cap stack delivers 2*Vsec_pk to the load and
n_main is doubled at design time. The reflected output voltage seen at
the magnetizing inductor is n_main*Vout/2, not n_main*Vout. Without
this correction the steady-state TDA solver saw Vo = 2*Vi, drove ILs ==
IL everywhere, and the analytical secondary current Id = ILs - IL
collapsed to zero. CoilAdviser then threw 'Current is not processed'
on the zero-RMS secondary winding and end-to-end MagneticAdviser
returned no results for HB+VD and FB+VD.

Drop [!mayfail] from Test_MagneticAdviserFromConverter_LLC_VoltageDoubler
(both variants now return >= 1 magnetic). A NOTE flags that peak Isec
in the analytical fallback still looks 4-6x high vs FB/CT/CD and that
SPICE codegen for the VD output stage still fails (silent analytical
fallback) — both warrant follow-up but no longer block adviser coverage.

Author: AlfVII

src/converter_models/Llc.cpp

@@ -797,6 +797,15 @@ OperatingPoint Llc::process_operating_point_for_input_voltage(
     // output. Multi-output secondaries are scaled per-output below.
     double n_main = get_n_for_output(0);
     double Vo = n_main * llcOpPoint.get_output_voltages()[0];
+    // For voltage-doubler, the cap stack provides 2·Vsec_pk to the load and
+    // n_main was doubled at design time (see process_design_requirements). The
+    // *reflected* output voltage seen at the magnetizing inductor is therefore
+    // n_main · Vout / 2, not n_main · Vout. Without this correction, the
+    // steady-state solver sees Vo = 2·Vi → no power transfer → ILs == IL and
+    // the analytical secondary current collapses to zero.
+    if (get_effective_rectifier_type() == LlcRectifierType::VOLTAGE_DOUBLER) {
+        Vo *= 0.5;
+    }
 
     if (magnetizingInductance <= 0) magnetizingInductance = 200e-6;
 

tests/TestMagneticAdviserConverterVariants.cpp

@@ -123,22 +123,15 @@ TEST_CASE("Test_MagneticAdviserFromConverter_LLC_VariantMatrix",
 }
 
 
-// FIXME(llc-voltage-doubler): two stacked bugs prevent VD from reaching the
-// adviser end-to-end. Tagged [!mayfail] so the contract is visible (we WILL
-// fix it) without blocking CI. Do not relax to size >= 0.
-//   (1) Llc.cpp::simulate_and_extract_operating_points — SPICE netlist for
-//       VOLTAGE_DOUBLER produces "No output file generated by ngspice"
-//       (Llc.cpp:1738). Either the VD output-stage subcircuit fails to
-//       converge or a node is unresolved. Inspect the generated netlist
-//       (set config.keepTempFiles=true) before fixing.
-//   (2) The analytical fallback path (process_operating_points) does not
-//       populate current.processed() on every VD winding, so the wire-solver
-//       throws "[INVALID_WIRE_DATA] Current is not processed" at the first
-//       call from CoilAdviser. Mirror what the CT/FB/CD branches do at
-//       Llc.cpp:1117–1226 and ensure processed-data is set for every emitted
-//       SignalDescriptor.
+// NOTE(llc-voltage-doubler): SPICE codegen for VOLTAGE_DOUBLER still emits
+// "No output file generated by ngspice" (Llc.cpp::simulate_and_extract_operating_points)
+// and the path falls back to the analytical TDA model. The analytical path
+// produces non-trivial Isec waveforms but their peak amplitudes look ~4–6×
+// higher than the FB/CT/CD equivalents and warrant a SPICE cross-check before
+// the model is considered production-ready. End-to-end MagneticAdviser
+// coverage is asserted here (≥1 result) so the contract is enforced.
 TEST_CASE("Test_MagneticAdviserFromConverter_LLC_VoltageDoubler",
-          "[adviser][from-converter][llc-topology][variant-matrix][!mayfail]") {
+          "[adviser][from-converter][llc-topology][variant-matrix]") {
     struct Variant { std::string bridge; std::string rectifier; std::string label; };
     std::vector<Variant> variants = {
         {"halfBridge", "voltageDoubler", "HB+VD"},