Skip to content

Commit 235aff4

Browse files
tony-davisammallya
authored andcommitted
Revert "[hipblaslt] Fix WorkgroupMappingXCC alignment for 38-CU kernels (cherry-pick #5009) (#5144)" (#5398)
This reverts PR #5144 (merge commit 5236414). ## Reason for Revert The release team for ROCm 7.2.1 has decided not to include the WorkgroupMappingXCC alignment fix from PR #5144 and has requested that it be reverted from the `release/rocm-rel-7.2` branch. ## What This Reverts This revert undoes the changes made in PR #5144, which was a cherry-pick of PR #5009 that fixed a performance regression in CPX Mode for AMD Instinct GPUs with 38-CU partitions. The original fix adjusted the WorkgroupMappingXCC parameter from 4 back to 1 for 38-CU configurations in the gfx942_38cu library's YAML configuration files. ## Impact After this revert, the WorkgroupMappingXCC values will return to their pre-#5144 state (value of 4 for several key kernels), which may reintroduce the performance regression in CPX Mode described in the original PR.
1 parent 587e8f7 commit 235aff4

21 files changed

Lines changed: 15841 additions & 15841 deletions

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_BBS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 743 additions & 743 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_BSS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 604 additions & 604 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_F8BS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 601 additions & 601 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_F8HS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 601 additions & 601 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 743 additions & 743 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_HSS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 604 additions & 604 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_SB_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 610 additions & 610 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bljk_BBS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 848 additions & 848 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bljk_BSS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 687 additions & 687 deletions
Large diffs are not rendered by default.

library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_38cu/GridBased/aquavanjaram_Cijk_Ailk_Bljk_F8BS_BH_Bias_HAS_SAV_UserArgs.yaml

Lines changed: 949 additions & 949 deletions
Large diffs are not rendered by default.

0 commit comments

Comments
 (0)