Bus address map

[cbespin]

We should find a way to generate an address map of all modules connected to the basil bus in a design

[cbespin]

This is implemented in 65843a4, right @kcaisley? Maybe we can move it to its own PR, since it anyway only adds one file?

[kcaisley]

As discussed, I would prefer to rewrite the script, since this version was generated. Now that I understand what the use case is better, I think I could write something much simpler myself. When done, I will open a pull request for the single file, and put it under basil/etc/checkbus.py.

[kcaisley]

I opened a rewritten version here: #275