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| 64-bit | int64_t | uint64_t | . | long long | unsigned<br/>long long | . | The core only uses a uint64_t in one library, when non-default options pull in legacy code ||
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| 64-bit | int64_t | uint64_t | . | long long | unsigned<br/>long long | . | The core only uses a uint64_t in one library, when non-default options pull in legacy code |
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a. Always use the smallest datatype appropriate for the data.
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b. If either a signed or unsigned value will work, use the unsigned one unless there is a reason not to; signed rollover is undefined behavior, and this has caused problems for many people. Most of the poor design decisions in C can be chalked up to humanity's inexperience with computing when it was designed. But I don't know what they were thinking w
Copy file name to clipboardExpand all lines: megaavr/extras/EA48.md
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@@ -66,7 +66,7 @@ The EA series, in general, got no new mux options:
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| ALT3 | PD4 | PD5 | PD6 | PD7 |
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| ALT4 | PC1 | PC2 | PC3 | - |
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| NONE | - | - | - | - |
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:
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#### USART1 mux options
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| All | TX | RX | XCK | XDIR |
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There's no TCD, but with two TCAs and 4 TCBs to back them up, you've still got a respectable 16 maximum independent outputs. TCA1 gained a few new mux options, but only 3-pin ones - but on the 48-pin parts, it can use the single 6-pin mapping!
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#### TCA mux options
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The Type A timers (TCA0 and TCA1) can be mapped to different pins as a group only, and analogWrite() is PORTMUX-aware - you can set TCA0 to output on any port's pin 0-5, and TCA1 to PORTB, or in 3 channel mode to ports C, A or D. Using this feature is easy - but not quite as trivial as other parts, since there are two bitfields. You simply write to the portmux register `PORTMUX.TCAROUTEA = (TCA1 pinset) | (TCA0 pinset)` and then analogWrite() normally. TCA0 pinset is the port number (0-5 for ports A-F). The pinsets values for TCA1 are shown below (equivalent to (0, 1, 4, or 5) << 3 - option 2 is PORTE4:6, and option 3 is PORTG0:5 - all pins we don't have here.
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The Type A timers (TCA0 and TCA1) can be mapped to different pins as a group only, and analogWrite() is PORTMUX-aware - you can set TCA0 to output on any port's pin 0-5, and TCA1 to PORTB, or in 3 channel mode to ports C, A or D, and analogWrite() will figure it out. Using this feature is easy - but not quite as trivial as other parts, since there are two bitfields. You simply write to the portmux register `PORTMUX.TCAROUTEA = (TCA1 pinset) | (TCA0 pinset)` and then analogWrite() normally. TCA0 pinset is the port number (0-5 for ports A-F). The pinsets values for TCA1 are shown below (equivalent to (0, 1, 4, or 5) << 3 - option 2 is PORTE4:6, and option 3 is PORTG0:5 - all pins we don't have here.
Copy file name to clipboardExpand all lines: megaavr/extras/Ref_Errata.md
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@@ -104,13 +104,13 @@ About 1 year after release, a "datasheet clarification" was issued for AVR128DA,
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* All serious programming issues fixed with B2/A2 die rev (B2 for 64k, since that's what they developed with and had to go through an entire major rev on before release. No wonder it was so late)).
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Supposedly the flash endurance issues are temperature sensitive too, and it was implied that at room temperature, the original spec was met.
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#### DU-series tried to get RWW working on the Dx-style NVMCTRL
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No dice!
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No dice - Not sure if this matters with careful program,miong. This method of programming sounds like it would be a lot harder than a page write machine.
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```text
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Read-While-Write Feature Non-Functional
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```
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Seems they've gotten most of the problems worked out, finally, other than the Dx-write endurance. 1000 rewrites is still enough though, and supposedly, the Dx-series parts meet the original (10k) spec at room temperature, just not over the whole temperature range (explaining why the problem had not been noticed for over a year)
Copy file name to clipboardExpand all lines: megaavr/libraries/Logic/README.md
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More information about CCL can be found in the [Microchip Application Note TB3218](http://ww1.microchip.com/downloads/en/AppNotes/TB3218-Getting-Started-with-CCL-90003218A.pdf) and in the [megaAVR-0 family data sheet](http://ww1.microchip.com/downloads/en/DeviceDoc/megaAVR0-series-Family-Data-Sheet-DS40002015B.pdf) and the datasheet for the part in question.
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## Pin availability and Quick Reference (Dx-series)
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## Pin availability and Quick Reference (Dx/Ex-series)
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Available pins for Dx and Ex have been unchanging. Inputs are always
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Logic Block | IN0-2 | OUT | ALT OUT | Availability | Notes:
|Logic0 IN | IN0 and IN1 universal on non-tiny modern AVRs. IN2 present except at 14-pins. |
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|Logic0 OUT | Output on PA3 and PA6 is available for all non-tiny modern AVRs with more than 14-pins. |
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|Logic1 IN | DU has no pin inputs for logic block 1. AVR DD-series parts do not have IN0 on the 14-pin or 20-pin parts. |
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|Logic1 OUT | Primary output present on all non-tiny modern AVRs. Alt output present on 48+ pin parts only. |
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|Logic2 IN | 14/20 pin parts do not have IN1, IN2. 28/32 pin DB/DD/SD parts do not have IN0. |
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|Logic2 OUT | Primary output unavailable on 14/20 pin parts. Alt output universal |
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|Logic3 IN | 14/20 pin parts have no inputs, 28 pin has IN0 and IN1, and 32+ pin gets IN2. |
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|Logic3 OUT | Primary output available on all parts with 32 or more pins. Alternate output not available |
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|Logic4 | Present in AVR DA/DB parts with at least 48 pins, all of which have all inputs and primary output. |
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|Logic4 OUT | Alt pin only available on 64-pin parts |
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|Logic5 | Present in AVR DA/DB parts with at least 48 pins, pins only present on 64-pin parts. |
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## Notes on other new parts:
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The DU has only PC3 out of the entire port C left, the rest having been given over to USB. This obviously takes out the inputs for LUT1.
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Notice how logic block 2 and 3 on 14/20 pin DD and logic block 5 on 48-pin parts have no dedicated pins. If you are not using pin input or output, use these logic blocks to conserve the more useful ones when not precluded by other considerations.
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### The EVSYS has changed in ways most likely to be relevant to people using the CCL in the DU EA, EB, and presumably all future parts.
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Two high visibility event system features got big changes. See the [Event](../Event/Readme.md) library for more detail.
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Previously, event channels were not equal: channels 0 and 1 could take event input from port A/B, 3 and 4 from C/D etcetera (the tiny2 did the obvious thing and linked them in a circle).
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Now, each port has an EVGENCTRLA, which takes the form 0bAaaaBbbb where A and B enable event 0 and 1 respectively, and aaa and bbb are the number of the pin generating this event.
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The same was done with the RTC event generator channels ,
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## Pin availability and Quick Reference (tinyAVR)
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This was simpler with 0/1-series (22 i/o pins, 10 CCL functions, none stacked onto the same pins), but with 2-series, 20 different CCL functions, crammed into just 22 GPIO pins, two of which have one blocks' input and one of the outputs for another. The ones with no inputs on lower pincount parts are more useful than one might expect; advanced use cases will often use mostly internal inputs - and the event system can always be used to get pin input in anyway - albeit at a cost of an event channel. If you do not require pin inputs, these should be used in preference to the logic blocks that do have them all else being equal
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logic::in::tca0; // Connect input to TCA0 WO0~2 for input 0~2
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logic::in::tca1; // Connect input to TCA1 WO0~2 for input 0~2 - unavailable on parts without a second TCA1
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logic::in::tca; // Synonym for tca0 (for compatibility with code written for tinyAVRs and megaAVR 0-series)
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logic::in::tce0; // On the EB, TCA0 is gone and TCE0 is in it's place; behavior frpm CCL perspective is near identical, the CCL can't even see the fourth channel.
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logic::in::tcf0; // Connect input to the waveform output of Timer/Counter F. input 1 gets the
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logic::in::tcd; // Connect input to TCD0 WOA, WOB, WOC (for input 0~2). Unavailable on EA-series as they don't have a TCD.
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logic::in::usart; // Connect input to TXD of USART 0~2 (for input 0~2). On parts with 2 USARTS, only works on inputs 0 and 1.
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logic::in::spi; // Connect input to whatever it is that SPI's event generator is. It is also unclear if this has changed.
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logic::in::spi; // Connect input to... is this just the clock of the SPI port in host mode only?! Why?!
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```
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Notes specific to Dx-series:
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* Notice that only SPI0 can be used. SPI input is supported in master mode only.
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* Notice that only TCB0-2, USART 0-2, and TCA0/1 WO0-2 can be used in this way.
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| 1 | 0 | 1 | 0 |
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| 1 | 1 | 0 | 1 |
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| 1 | 1 | 1 | 1 |
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Which would translate into a truth value of 0b11010100 or 0xD4.
Copy file name to clipboardExpand all lines: megaavr/libraries/Opamp/README.md
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See also chapter 35: OPAMP - Analog Signal Processing of the datasheet. Section 35.3.7, "Applications Usage" is particularly valuable, showing the equivalent circuit and settings required for all registers to achieve a number of common opamp use cases - voltage followers, inverting and non-inverting programmable gain amplifiers, integrators (requires an external resistor and capacitor), differential amplifiers, and using all three opamps, even an instrumentation amplifier (a differential amplifier with each input buffered by a voltage follower)
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