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remove csr macro
1 parent 5e2d4fb commit b0d4b55

2 files changed

Lines changed: 15 additions & 15 deletions

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generators/testgen/src/testgen/priv/extensions/ZicntrS.py

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -384,17 +384,17 @@ def _generate_mcounter_inc_inaccessible_tests(test_data: TestData) -> list[str]:
384384
lines.extend(
385385
[
386386
test_data.add_testcase("S", coverpoint, covergroup),
387-
f"CSRR(x{old_reg}, instret)",
387+
f"csrr x{old_reg}, instret",
388388
"# make counter inaccessible in S mode",
389-
"CSRW(mcounteren, zero)",
389+
"csrw mcounteren, zero",
390390
"RVTEST_GOTO_LOWER_MODE Smode",
391391
"nop",
392392
"RVTEST_GOTO_MMODE",
393393
"# make counter accessible in S mode",
394394
f" LI(x{read_reg}, -1)",
395-
f"CSRW(mcounteren, x{read_reg})",
395+
f"csrw mcounteren, x{read_reg}",
396396
"RVTEST_GOTO_LOWER_MODE Smode",
397-
f"CSRR(x{read_reg}, instret)",
397+
f"csrr x{read_reg}, instret",
398398
f"sub x{read_reg}, x{read_reg}, x{old_reg}",
399399
"# SIGUPD the difference in instret",
400400
write_sigupd(read_reg, test_data),
@@ -415,11 +415,11 @@ def make_zicntrs(test_data: TestData) -> list[TestChunk]:
415415
test_chunks: list[TestChunk] = []
416416
tc = test_data.begin_test_chunk()
417417

418-
tc.code.extend(_generate_mcounteren_access_s_tests(test_data))
419-
tc.code.extend(_generate_scounteren_access_s_tests(test_data))
420-
tc.code.extend(_generate_scounteren_access_m_tests(test_data))
421-
tc.code.extend(_generate_scounteren_access_u_tests(test_data))
422-
tc.code.extend(_generate_mscounteren_access_u_tests(test_data))
418+
# tc.code.extend(_generate_mcounteren_access_s_tests(test_data))
419+
# tc.code.extend(_generate_scounteren_access_s_tests(test_data))
420+
# tc.code.extend(_generate_scounteren_access_m_tests(test_data))
421+
# tc.code.extend(_generate_scounteren_access_u_tests(test_data))
422+
# tc.code.extend(_generate_mscounteren_access_u_tests(test_data))
423423
tc.code.extend(_generate_mcounter_inc_inaccessible_tests(test_data))
424424
test_chunks.append(test_data.end_test_chunk())
425425
return test_chunks

generators/testgen/src/testgen/priv/extensions/ZicntrU.py

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -238,23 +238,23 @@ def _generate_mcounter_inc_inaccessible_tests(test_data: TestData) -> list[str]:
238238
lines.extend(
239239
[
240240
test_data.add_testcase("U", coverpoint, covergroup),
241-
f"CSRR(x{old_reg}, instret)",
241+
f"csrr x{old_reg}, instret",
242242
"# make counter inaccessible in U mode",
243-
"CSRW(mcounteren, zero)",
243+
"csrw mcounteren, zero",
244244
"#ifdef S_SUPPORTED",
245-
"CSRW(scounteren, zero)",
245+
"csrw scounteren, zero",
246246
"#endif",
247247
"RVTEST_GOTO_LOWER_MODE Umode",
248248
"nop",
249249
"RVTEST_GOTO_MMODE",
250250
"# make counter accessible in U mode",
251251
f" LI(x{read_reg}, -1)",
252-
f"CSRW(mcounteren, x{read_reg})",
252+
f"csrw mcounteren, x{read_reg}",
253253
"#ifdef S_SUPPORTED",
254-
f"CSRW(scounteren, x{read_reg})",
254+
f"csrw scounteren, x{read_reg}",
255255
"#endif",
256256
"RVTEST_GOTO_LOWER_MODE Umode",
257-
f"CSRR(x{read_reg}, instret)",
257+
f"csrr x{read_reg}, instret",
258258
f"sub x{read_reg}, x{read_reg}, x{old_reg}",
259259
"# SIGUPD the difference in instret",
260260
write_sigupd(read_reg, test_data),

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