Sequence execution from architecture spec to credible prototypes with explicit gates and dependencies.
Lock definitions, claims, and benchmark protocol.
unified architecture spec.mdbenchmark disproof matrix.md- Existing vision and landscape notes
- Stable interface glossary
- Claim-to-benchmark traceability table
- Prototype scope document (what is in/out for phase 1)
- No unresolved contradictions across core contracts
- All major claims mapped to measurable tests
Prove software-only viability without ISA changes.
- WorkGraph admission and runtime dependency checks
- Ownership transition tracking for buffers/pages
- Capability-scoped execution boundaries
- Polling/threshold event path for at least one high-rate I/O path
- New opcodes
- Full production driver stack
- End-user programming language ergonomics
- P1-M1: WorkNode schema admission pipeline operational
- P1-M2: Dependency-safe dispatch and completion signaling
- P1-M3: Ownership transfer integrated with I/O path
- P1-M4: Baseline benchmark harness executing all 3 workloads
- Meet promotion rules in benchmark matrix (minimum threshold pass conditions)
- No unresolved safety invariant violations
Emit kernel-consumable work graph declarations from compiler/runtime IR.
- Define intermediate schema mapping from MLIR/TVM/XLA-like graph IR to WorkNode declarations
- Generate
deps, region access descriptors, deadline class, and capability requests - Validate fidelity between IR graph and runtime graph
- P2-M1: IR-to-WorkNode mapping draft
- P2-M2: Auto-generated graph declarations for tensor workload
- P2-M3: Graph fidelity checks and diagnostics
- P2-M4: End-to-end benchmark with generated declarations
- Compiler-emitted declarations perform within 5-10% of hand-authored declarations
- Declaration errors are diagnosable with actionable tooling output
Evaluate which semantic opcodes provide material benefit and justify hardware collaboration.
- Emulation/proxy evaluation of intent-bearing opcode classes
- Prioritize minimal opcode set by measured impact
- Draft proposal language for open ISA ecosystem (e.g., RISC-V channels)
- Graph completion signaling
- Deep prefetch intent
- Tagged branch speculation hints
- Tensor tile fused operations (where not already available)
- P3-M1: Opcode candidate shortlist ranked by expected benefit
- P3-M2: Software proxy benchmark evidence
- P3-M3: Draft extension proposal package
- At least 1-2 opcode classes show material gains beyond software-only ceiling
- Verification stream: Invariant checking and failure classification.
- Tooling stream: Declaration linting, graph debug visualizer, workload trace export.
- Collaboration stream: Regular touchpoints across OS, compiler, and hardware contributors.
flowchart TD
p0[Phase0Consolidation] --> p1[Phase1seL4RuntimePrototype]
p1 --> p2[Phase2CompilerBridge]
p2 --> p3[Phase3HardwareExtension]
p1 --> verify[VerificationStream]
p2 --> tooling[ToolingStream]
p3 --> collab[CollaborationStream]
verify --> p3
tooling --> p3
collab --> p3
- Risk: Prototype overhead erodes gains.
- Mitigation: Early ablations and strict disproof conditions.
- Risk: Graph declaration burden is too high.
- Mitigation: Prioritize compiler-generated declarations in Phase 2.
- Risk: Cross-discipline collaboration stalls.
- Mitigation: Maintain shared artifact contracts and monthly integration reviews.