@@ -785,6 +785,39 @@ pub const INSTRUCTIONS: &[Instruction] = &[
785785 assert ! ( m. test_bit( "SR" , NEGATIVE ) , "negative flag not set" ) ;
786786 } ,
787787 } ,
788+ Instruction {
789+ mnemonic : "LDA" ,
790+ mode : Mode :: AbsoluteX ,
791+ opcode : 0xBD ,
792+ bytes : 3 ,
793+ cycles : 4 ,
794+ execute : |m| {
795+ let base = m. fetch16 ( ) ;
796+ let addr = base. wrapping_add ( m. reg ( "XR" ) . into ( ) ) ;
797+ load_reg ( m, "AC" , m. get8 ( addr) ) ;
798+ } ,
799+ test : |m| {
800+ m. set8 ( 0x0102 , 0xFF ) ;
801+ m. run_program ( & [
802+ 0xA2 , 0x02 , // $0000 LDX #$02
803+ 0xBD , 0x00 , 0x01 , // $0002 LDA $0100,X
804+ 0x00 , // $0005 BRK
805+ ] ) ;
806+ assert_eq ! ( m. reg( "AC" ) , 0xFF , "wrong AC" ) ;
807+ assert ! ( !m. test_bit( "SR" , ZERO ) , "zero flag not cleared" ) ;
808+ assert ! ( m. test_bit( "SR" , NEGATIVE ) , "negative flag not set" ) ;
809+
810+ m. set8 ( 0x0102 , 0x00 ) ;
811+ m. run_program ( & [
812+ 0xA2 , 0x02 , // $0000 LDX #$02
813+ 0xBD , 0x00 , 0x01 , // $0002 LDA $0100,X
814+ 0x00 , // $0005 BRK
815+ ] ) ;
816+ assert_eq ! ( m. reg( "AC" ) , 0x00 , "wrong AC" ) ;
817+ assert ! ( m. test_bit( "SR" , ZERO ) , "zero flag not set" ) ;
818+ assert ! ( !m. test_bit( "SR" , NEGATIVE ) , "negative flag not cleared" ) ;
819+ } ,
820+ } ,
788821 Instruction {
789822 mnemonic : "LDX" ,
790823 mode : Mode :: Immediate ,
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