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twabbott-openaitwabbott-openai
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br_apb_demux Implementation (xlsynth#1238)
# Summary Adds an APB demux with shared address decoding, one-hot routing, optional retiming, and focused simulation coverage; refactors the CSR demux to reuse the address decoder.
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Lines changed: 975 additions & 69 deletions

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‎amba/rtl/BUILD.bazel‎

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@@ -119,6 +119,30 @@ verilog_library(
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],
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)
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verilog_library(
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name = "br_apb_demux_select_onehot",
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srcs = ["br_apb_demux_select_onehot.sv"],
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deps = [
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":br_amba_apb_timing_slice",
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":br_amba_pkg",
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"//macros:br_asserts_internal",
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"//macros:br_unused",
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"//mux/rtl:br_mux_onehot",
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],
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)
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verilog_library(
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name = "br_apb_demux",
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srcs = ["br_apb_demux.sv"],
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deps = [
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":br_amba_pkg",
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":br_apb_demux_select_onehot",
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"//demux/rtl:br_demux_addr_decode",
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"//macros:br_asserts_internal",
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"//macros:br_unused",
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],
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)
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br_verilog_elab_and_lint_test_suite(
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name = "br_amba_axil2apb_test_suite",
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params = {
@@ -341,6 +365,113 @@ br_verilog_elab_and_lint_test_suite(
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deps = [":br_amba_apb_timing_slice"],
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)
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br_verilog_elab_and_lint_test_suite(
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name = "br_apb_demux_select_onehot_test_suite",
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params = {
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"AddrWidth": [
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"12",
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"32",
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],
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"EnableDecodeError": [
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"0",
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"1",
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],
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"NumDownstreams": [
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"2",
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"3",
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],
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},
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deps = [":br_apb_demux_select_onehot"],
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)
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br_verilog_elab_and_lint_test_suite(
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name = "br_apb_demux_select_onehot_test_suite_single_downstream",
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params = {
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"AddrWidth": [
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"12",
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"32",
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],
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"EnableDecodeError": [
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"0",
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"1",
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],
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"NumDownstreams": ["1"],
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},
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deps = [":br_apb_demux_select_onehot"],
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)
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br_verilog_synth_suite(
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name = "br_apb_demux_select_onehot_baseline_ppa",
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params = {
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"AddrWidth": ["16"],
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"EnableDecodeError": ["1"],
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"NumDownstreams": ["4"],
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},
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deps = [":br_apb_demux_select_onehot"],
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)
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br_verilog_synth_suite(
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name = "br_apb_demux_select_onehot_scaled_ppa",
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params = {
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"AddrWidth": ["32"],
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"EnableDecodeError": ["0"],
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"NumDownstreams": ["16"],
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},
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deps = [":br_apb_demux_select_onehot"],
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)
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br_verilog_elab_and_lint_test_suite(
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name = "br_apb_demux_test_suite",
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params = {
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"AddrWidth": [
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"12",
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"32",
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],
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"HasDefaultDownstream": [
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"0",
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"1",
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],
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"NumDownstreams": [
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"2",
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"3",
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],
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},
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deps = [":br_apb_demux"],
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)
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br_verilog_elab_and_lint_test_suite(
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name = "br_apb_demux_test_suite_single_downstream",
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params = {
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"AddrWidth": [
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"12",
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"32",
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],
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"HasDefaultDownstream": ["0"],
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"NumDownstreams": ["1"],
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},
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deps = [":br_apb_demux"],
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)
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br_verilog_synth_suite(
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name = "br_apb_demux_baseline_ppa",
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params = {
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"AddrWidth": ["16"],
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"HasDefaultDownstream": ["0"],
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"NumDownstreams": ["4"],
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},
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deps = [":br_apb_demux"],
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)
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br_verilog_synth_suite(
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name = "br_apb_demux_scaled_ppa",
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params = {
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"AddrWidth": ["32"],
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"HasDefaultDownstream": ["1"],
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"NumDownstreams": ["16"],
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},
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deps = [":br_apb_demux"],
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)
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verilog_library(
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name = "br_amba_axi_isolate_sub",
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srcs = ["br_amba_axi_isolate_sub.sv"],

‎amba/rtl/br_apb_demux.sv‎

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// SPDX-License-Identifier: Apache-2.0
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//
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// Bedrock-RTL Address-Decoding APB Demux
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//
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// Routes APB transfers to the correct downstream interface based on PADDR.
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// Address ranges, optional masking, normalization, and default routing use the
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// protocol-neutral br_demux_addr_decode helper. APB fanout, timing, and
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// response handling use br_apb_demux_select_onehot.
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`include "br_asserts_internal.svh"
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`include "br_unused.svh"
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module br_apb_demux #(
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parameter int AddrWidth = 12, // Must be at least 12
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parameter int NumDownstreams = 1, // Must be at least 1
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// ri lint_check_waive ARRAY_LENGTH_ONE
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parameter int NumRetimeStages[NumDownstreams] = '{default: 0},
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// When set, the final downstream receives every address that misses the
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// explicit ranges. Otherwise, misses complete with PSLVERR.
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parameter bit HasDefaultDownstream = 0,
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localparam int NumAddressRanges = HasDefaultDownstream ? NumDownstreams - 1 : NumDownstreams,
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// Require enabled ranges to be power-of-two sized and naturally aligned.
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// ri lint_check_waive ARRAY_LENGTH_ONE
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parameter bit RequirePowerOfTwoAlignedRanges[NumAddressRanges] = '{default: 1},
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// Rebase each explicit downstream address before applying its output mask.
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// ri lint_check_waive ARRAY_LENGTH_ONE
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parameter bit NormalizeDownstreamAddress[NumAddressRanges] = '{default: 0},
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// Mask used only for address decode; forwarded addresses remain unmasked.
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parameter logic [AddrWidth-1:0] UpstreamAddrMask = '1,
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// Mask applied to each forwarded address after optional normalization.
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parameter logic [NumDownstreams-1:0][AddrWidth-1:0] DownstreamAddrMask = '1
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) (
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input logic clk,
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input logic rst,
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input logic [AddrWidth-1:0] upstream_paddr,
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input logic upstream_psel,
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input logic upstream_penable,
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input logic [br_amba::ApbProtWidth-1:0] upstream_pprot,
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input logic [3:0] upstream_pstrb,
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input logic upstream_pwrite,
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// TODO(twabbott): Parameterize APB data/strobe widths once br_amba_apb_timing_slice supports it.
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input logic [31:0] upstream_pwdata,
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output logic [31:0] upstream_prdata,
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output logic upstream_pready,
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output logic upstream_pslverr,
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// Configurable ranges must remain stable while an APB transfer is pending.
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input logic [NumAddressRanges-1:0][AddrWidth-1:0] downstream_addr_base,
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input logic [NumAddressRanges-1:0][AddrWidth-1:0] downstream_addr_size,
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output logic [NumDownstreams-1:0][AddrWidth-1:0] downstream_paddr,
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output logic [NumDownstreams-1:0] downstream_psel,
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output logic [NumDownstreams-1:0] downstream_penable,
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output logic [NumDownstreams-1:0][br_amba::ApbProtWidth-1:0] downstream_pprot,
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output logic [NumDownstreams-1:0][3:0] downstream_pstrb,
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output logic [NumDownstreams-1:0] downstream_pwrite,
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output logic [NumDownstreams-1:0][31:0] downstream_pwdata,
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input logic [NumDownstreams-1:0][31:0] downstream_prdata,
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input logic [NumDownstreams-1:0] downstream_pready,
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input logic [NumDownstreams-1:0] downstream_pslverr
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);
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// Integration Checks
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logic upstream_request_pending;
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assign upstream_request_pending = upstream_psel && (!upstream_penable || !upstream_pready);
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`BR_ASSERT_STATIC(legal_num_downstreams_a, NumDownstreams >= 1 + HasDefaultDownstream)
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`BR_ASSERT_STATIC(legal_addr_width_a, AddrWidth >= 12)
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`BR_ASSERT_INTG(addr_map_stable_while_pending_a, upstream_request_pending |=> $stable
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({downstream_addr_base, downstream_addr_size}))
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`BR_UNUSED(upstream_request_pending)
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// Implementation
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logic [NumDownstreams-1:0] select_onehot;
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logic [NumDownstreams-1:0][AddrWidth-1:0] downstream_paddr_unmasked;
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br_demux_addr_decode #(
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.AddrWidth(AddrWidth),
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.NumDownstreams(NumDownstreams),
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.HasDefaultDownstream(HasDefaultDownstream),
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.RequirePowerOfTwoAlignedRanges(RequirePowerOfTwoAlignedRanges),
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.NormalizeDownstreamAddress(NormalizeDownstreamAddress),
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.UpstreamAddrMask(UpstreamAddrMask),
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.DownstreamAddrMask(DownstreamAddrMask)
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) br_demux_addr_decode (
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.clk,
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.rst,
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.addr_valid(upstream_psel),
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.upstream_addr(upstream_paddr),
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.downstream_addr_base,
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.downstream_addr_size,
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.downstream_addr_in(downstream_paddr_unmasked),
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.select_onehot,
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.downstream_addr_out(downstream_paddr)
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);
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br_apb_demux_select_onehot #(
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.AddrWidth(AddrWidth),
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.NumDownstreams(NumDownstreams),
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.EnableDecodeError(!HasDefaultDownstream),
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.NumRetimeStages(NumRetimeStages)
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) br_apb_demux_select_onehot (
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.clk,
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.rst,
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.select_onehot,
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.upstream_paddr,
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.upstream_psel,
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.upstream_penable,
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.upstream_pprot,
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.upstream_pstrb,
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.upstream_pwrite,
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.upstream_pwdata,
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.upstream_prdata,
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.upstream_pready,
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.upstream_pslverr,
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.downstream_paddr(downstream_paddr_unmasked),
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.downstream_psel,
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.downstream_penable,
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.downstream_pprot,
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.downstream_pstrb,
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.downstream_pwrite,
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.downstream_pwdata,
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.downstream_prdata,
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.downstream_pready,
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.downstream_pslverr
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);
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endmodule : br_apb_demux

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