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| 1 | +/dts-v1/; |
| 2 | +/plugin/; |
| 3 | + |
| 4 | +#include <dt-bindings/interrupt-controller/irq.h> |
| 5 | +#include <dt-bindings/gpio/gpio.h> |
| 6 | +#include <dt-bindings/pinctrl/rockchip.h> |
| 7 | +#include <dt-bindings/display/drm_mipi_dsi.h> |
| 8 | +#include <dt-bindings/pwm/pwm.h> |
| 9 | + |
| 10 | +/ { |
| 11 | + metadata { |
| 12 | + title ="Enable Radxa Display 10FHD"; |
| 13 | + compatible = "radxa,rock-5t"; |
| 14 | + category = "display"; |
| 15 | + exclusive = "dsi1", "GPIO1_A2"; |
| 16 | + description = "Enable Radxa Display 10FHD."; |
| 17 | + }; |
| 18 | +}; |
| 19 | + |
| 20 | +/ { |
| 21 | + fragment@0 { |
| 22 | + target-path = "/"; |
| 23 | + |
| 24 | + __overlay__ { |
| 25 | + vcc_lcd_mipi1: vcc-lcd-mipi1 { |
| 26 | + status = "okay"; |
| 27 | + compatible = "regulator-fixed"; |
| 28 | + regulator-name = "vcc_lcd_mipi1"; |
| 29 | + gpio = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; |
| 30 | + enable-active-high; |
| 31 | + regulator-boot-on; |
| 32 | + regulator-state-mem { |
| 33 | + regulator-off-in-suspend; |
| 34 | + }; |
| 35 | + }; |
| 36 | + |
| 37 | + dsi1_backlight: dsi1-backlight { |
| 38 | + status = "okay"; |
| 39 | + compatible = "pwm-backlight"; |
| 40 | + pwms = <&pwm2 0 25000 PWM_POLARITY_INVERTED>; |
| 41 | + brightness-levels = < |
| 42 | + 0 20 20 21 21 22 22 23 |
| 43 | + 23 24 24 25 25 26 26 27 |
| 44 | + 27 28 28 29 29 30 30 31 |
| 45 | + 31 32 32 33 33 34 34 35 |
| 46 | + 35 36 36 37 37 38 38 39 |
| 47 | + 40 41 42 43 44 45 46 47 |
| 48 | + 48 49 50 51 52 53 54 55 |
| 49 | + 56 57 58 59 60 61 62 63 |
| 50 | + 64 65 66 67 68 69 70 71 |
| 51 | + 72 73 74 75 76 77 78 79 |
| 52 | + 80 81 82 83 84 85 86 87 |
| 53 | + 88 89 90 91 92 93 94 95 |
| 54 | + 96 97 98 99 100 101 102 103 |
| 55 | + 104 105 106 107 108 109 110 111 |
| 56 | + 112 113 114 115 116 117 118 119 |
| 57 | + 120 121 122 123 124 125 126 127 |
| 58 | + 128 129 130 131 132 133 134 135 |
| 59 | + 136 137 138 139 140 141 142 143 |
| 60 | + 144 145 146 147 148 149 150 151 |
| 61 | + 152 153 154 155 156 157 158 159 |
| 62 | + 160 161 162 163 164 165 166 167 |
| 63 | + 168 169 170 171 172 173 174 175 |
| 64 | + 176 177 178 179 180 181 182 183 |
| 65 | + 184 185 186 187 188 189 190 191 |
| 66 | + 192 193 194 195 196 197 198 199 |
| 67 | + 200 201 202 203 204 205 206 207 |
| 68 | + 208 209 210 211 212 213 214 215 |
| 69 | + 216 217 218 219 220 221 222 223 |
| 70 | + 224 225 226 227 228 229 230 231 |
| 71 | + 232 233 234 235 236 237 238 239 |
| 72 | + 240 241 242 243 244 245 246 247 |
| 73 | + 248 249 250 251 252 253 254 255 |
| 74 | + >; |
| 75 | + default-brightness-level = <200>; |
| 76 | + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; |
| 77 | + pinctrl-names = "default"; |
| 78 | + pinctrl-0 = <&dsi1_backlight_en>; |
| 79 | + }; |
| 80 | + }; |
| 81 | + }; |
| 82 | + |
| 83 | + fragment@1 { |
| 84 | + target = <&pwm2>; |
| 85 | + |
| 86 | + __overlay__ { |
| 87 | + status = "okay"; |
| 88 | + pinctrl-names = "active"; |
| 89 | + pinctrl-0 = <&pwm2m2_pins>; |
| 90 | + }; |
| 91 | + }; |
| 92 | + |
| 93 | + fragment@2 { |
| 94 | + target = <&dsi1>; |
| 95 | + |
| 96 | + __overlay__ { |
| 97 | + status = "okay"; |
| 98 | + #address-cells = <1>; |
| 99 | + #size-cells = <0>; |
| 100 | + |
| 101 | + dsi1_panel: panel@0 { |
| 102 | + status = "okay"; |
| 103 | + compatible = "simple-panel-dsi"; |
| 104 | + reg = <0>; |
| 105 | + backlight = <&dsi1_backlight>; |
| 106 | + |
| 107 | + vdd-supply = <&vcc_lcd_mipi1>; |
| 108 | + vccio-supply = <&vcc_1v8_s0>; |
| 109 | + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; |
| 110 | + pinctrl-names = "default"; |
| 111 | + pinctrl-0 = <&dsi1_lcd_rst_gpio>; |
| 112 | + |
| 113 | + prepare-delay-ms = <120>; |
| 114 | + reset-delay-ms = <120>; |
| 115 | + init-delay-ms = <120>; |
| 116 | + enable-delay-ms = <100>; |
| 117 | + disable-delay-ms = <120>; |
| 118 | + unprepare-delay-ms = <120>; |
| 119 | + |
| 120 | + width-mm = <62>; |
| 121 | + height-mm = <110>; |
| 122 | + |
| 123 | + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | |
| 124 | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>; |
| 125 | + dsi,format = <MIPI_DSI_FMT_RGB888>; |
| 126 | + dsi,lanes = <4>; |
| 127 | + |
| 128 | + panel-init-sequence = [ |
| 129 | + 05 78 01 11 |
| 130 | + 05 00 01 29 |
| 131 | + ]; |
| 132 | + |
| 133 | + panel-exit-sequence = [ |
| 134 | + 05 00 01 28 |
| 135 | + 05 00 01 10 |
| 136 | + ]; |
| 137 | + |
| 138 | + display-timings { |
| 139 | + native-mode = <&timing0>; |
| 140 | + timing0: timing0 { |
| 141 | + clock-frequency = <160000000>; |
| 142 | + hactive = <1200>; |
| 143 | + vactive = <1920>; |
| 144 | + |
| 145 | + vback-porch = <25>; |
| 146 | + vfront-porch = <35>; |
| 147 | + |
| 148 | + hback-porch = <60>; |
| 149 | + hfront-porch = <80>; |
| 150 | + |
| 151 | + hsync-len = <4>; |
| 152 | + vsync-len = <4>; |
| 153 | + |
| 154 | + vsync-active = <0>; |
| 155 | + hsync-active = <0>; |
| 156 | + de-active = <0>; |
| 157 | + pixelclk-active = <0>; |
| 158 | + }; |
| 159 | + }; |
| 160 | + |
| 161 | + ports { |
| 162 | + #address-cells = <1>; |
| 163 | + #size-cells = <0>; |
| 164 | + |
| 165 | + port@0 { |
| 166 | + reg = <0>; |
| 167 | + panel_in_dsi1: endpoint { |
| 168 | + remote-endpoint = <&dsi1_out_panel>; |
| 169 | + }; |
| 170 | + }; |
| 171 | + }; |
| 172 | + }; |
| 173 | + |
| 174 | + ports { |
| 175 | + #address-cells = <1>; |
| 176 | + #size-cells = <0>; |
| 177 | + |
| 178 | + port@1 { |
| 179 | + reg = <1>; |
| 180 | + dsi1_out_panel: endpoint { |
| 181 | + remote-endpoint = <&panel_in_dsi1>; |
| 182 | + }; |
| 183 | + }; |
| 184 | + }; |
| 185 | + }; |
| 186 | + }; |
| 187 | + |
| 188 | + fragment@3 { |
| 189 | + target = <&mipi_dcphy1>; |
| 190 | + |
| 191 | + __overlay__ { |
| 192 | + status = "okay"; |
| 193 | + }; |
| 194 | + }; |
| 195 | + |
| 196 | + fragment@4 { |
| 197 | + target = <&route_dsi1>; |
| 198 | + |
| 199 | + __overlay__ { |
| 200 | + status = "okay"; |
| 201 | + connect = <&vp3_out_dsi1>; |
| 202 | + }; |
| 203 | + }; |
| 204 | + |
| 205 | + fragment@5 { |
| 206 | + target = <&dsi1_in_vp2>; |
| 207 | + |
| 208 | + __overlay__ { |
| 209 | + status = "disabled"; |
| 210 | + }; |
| 211 | + }; |
| 212 | + |
| 213 | + fragment@6 { |
| 214 | + target = <&dsi1_in_vp3>; |
| 215 | + |
| 216 | + __overlay__ { |
| 217 | + status = "okay"; |
| 218 | + }; |
| 219 | + }; |
| 220 | + |
| 221 | + fragment@7 { |
| 222 | + target = <&i2c6>; |
| 223 | + |
| 224 | + __overlay__ { |
| 225 | + status = "okay"; |
| 226 | + pinctrl-names = "default"; |
| 227 | + pinctrl-0 = <&i2c6m0_xfer>; |
| 228 | + clock-frequency = <400000>; |
| 229 | + #address-cells = <1>; |
| 230 | + #size-cells = <0>; |
| 231 | + |
| 232 | + gt9xx: gt9xx@14 { |
| 233 | + compatible = "goodix,gt9271"; |
| 234 | + reg = <0x14>; |
| 235 | + interrupt-parent = <&gpio0>; |
| 236 | + interrupts = <RK_PD3 IRQ_TYPE_LEVEL_HIGH>; |
| 237 | + irq-gpios = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; |
| 238 | + reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; |
| 239 | + touchscreen-size-x = <1200>; |
| 240 | + touchscreen-size-y = <1920>; |
| 241 | + status = "okay"; |
| 242 | + }; |
| 243 | + }; |
| 244 | + }; |
| 245 | + |
| 246 | + fragment@8 { |
| 247 | + target = <&pinctrl>; |
| 248 | + |
| 249 | + __overlay__ { |
| 250 | + dsi1-lcd { |
| 251 | + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { |
| 252 | + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; |
| 253 | + }; |
| 254 | + |
| 255 | + dsi1_backlight_en: dsi1-backlight-en { |
| 256 | + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; |
| 257 | + }; |
| 258 | + }; |
| 259 | + }; |
| 260 | + }; |
| 261 | +}; |
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