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1 parent 2aa9e16 commit bb63e1aCopy full SHA for bb63e1a
3 files changed
Makefile
@@ -13,6 +13,7 @@ SRCS = \
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target_atmel_cm4v2.c \
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target_mchp_cm23.c \
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target_st_stm32g0.c \
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+ target_st_stm32wb55.c \
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target_gd_gd32f4xx.c \
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target_nu_m480.c \
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target_lattice_lcmxo2.c \
target.c
@@ -30,6 +30,7 @@ extern target_ops_t target_atmel_cm7_ops;
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extern target_ops_t target_atmel_cm4v2_ops;
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extern target_ops_t target_mchp_cm23_ops;
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extern target_ops_t target_st_stm32g0_ops;
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+extern target_ops_t target_st_stm32wb55_ops;
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extern target_ops_t target_gd_gd32f4xx_ops;
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extern target_ops_t target_nu_m480_ops;
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extern target_ops_t target_lattice_lcmxo2_ops;
@@ -45,6 +46,7 @@ static target_t targets[] =
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{ "atmel_cm4v2", "Atmel SAM D5x/E5x", &target_atmel_cm4v2_ops },
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{ "mchp_cm23", "Microchip SAM L10/L11, PIC32CM LE00/LS00/LS60", &target_mchp_cm23_ops },
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{ NULL, "STMicroelectronics STM32G0", &target_st_stm32g0_ops },
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+ { NULL, "STMicroelectronics STM32WB55", &target_st_stm32wb55_ops },
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{ NULL, "GigaDevice GD32F4xx", &target_gd_gd32f4xx_ops },
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{ NULL, "Nuvoton M480", &target_nu_m480_ops },
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{ NULL, "Lattice LCMXO2", &target_lattice_lcmxo2_ops },
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