@@ -132,8 +132,8 @@ Fortunately, FT232H device is fitted with real open collector outputs, and
132132PyFtdi always enable this mode on SCL and SDA lines when a FT232H device is
133133used.
134134
135- Other FTDI devices such as FT2232H, FT4232H and FT4232HA do not support open
136- collector mode, and source current to SCL and SDA lines.
135+ Other FTDI devices such as FT2232H and FT4232H/HA/HP do not
136+ support open collector mode, and source current to SCL and SDA lines.
137137
138138Clock streching
139139```````````````
@@ -142,9 +142,9 @@ Clock stretching is supported through a hack that re-uses the JTAG adaptative
142142clock mode designed for ARM devices. FTDI HW drives SCL on ``AD0 `` (`BD0 `), and
143143samples the SCL line on : the 8\ :sup: `th` pin of a port ``AD7 `` (``BD7 ``).
144144
145- When a FTDI device without an open collector capability is used
146- (FT2232H, FT4232H, FT4232HA ) the current sourced from AD0 may prevent proper
147- sampling ofthe SCL line when the slave attempts to strech the clock. It is
145+ When a FTDI device without an open collector capability is used (FT2232H,
146+ FT4232H/HA/HP ) the current sourced from AD0 may prevent proper sampling of
147+ the SCL line when the slave attempts to strech the clock. It is
148148therefore recommended to add a low forward voltage drop diode to `AD0 ` to
149149prevent AD0 to source current to the SCL bus. See the wiring section.
150150
@@ -187,5 +187,6 @@ Wiring
187187*Fig.1 *:
188188
189189* ``D1 `` is only required when clock streching is used along with
190- FT2232H, FT4232H or FT4232HA devices. It should not be fit with an FT232H.
190+ FT2232H or FT4232H/HA/HP devices. It should not be fit with
191+ an FT232H.
191192* ``AD7 `` may be used as a regular GPIO with clock stretching is not required.
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