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Merge pull request #435 from eblot/ft4232h_followup
FT4232HP follow up
2 parents b84991e + 7a0bf11 commit 25d77b0

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README.md

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@@ -32,8 +32,7 @@ Suported FTDI devices include:
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* FT2232C/D (dual port, clock up to 6 MHz)
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* FT232H (single port, clock up to 30 MHz)
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* FT2232H (dual port, clock up to 30 MHz)
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* FT4232H (quad port, clock up to 30 MHz)
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* FT4232HA (quad port, clock up to 30 MHz)
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* FT4232H/HA/HP (quad port, clock up to 30 MHz)
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## Features
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pyftdi/__init__.py

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# Copyright (c) 2010-2025 Emmanuel Blot <emmanuel.blot@free.fr>
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# Copyright (c) 2010-2026 Emmanuel Blot <emmanuel.blot@free.fr>
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# Copyright (c) 2010-2016, Neotion
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# All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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# pylint: disable=missing-docstring
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__version__ = '0.57.1'
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__version__ = '0.57.2'
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__title__ = 'PyFtdi'
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__description__ = 'FTDI device driver (pure Python)'
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__uri__ = 'http://github.com/eblot/pyftdi'

pyftdi/doc/api/i2c.rst

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PyFtdi always enable this mode on SCL and SDA lines when a FT232H device is
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used.
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Other FTDI devices such as FT2232H, FT4232H and FT4232HA do not support open
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collector mode, and source current to SCL and SDA lines.
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Other FTDI devices such as FT2232H and FT4232H/HA/HP do not
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support open collector mode, and source current to SCL and SDA lines.
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Clock streching
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```````````````
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clock mode designed for ARM devices. FTDI HW drives SCL on ``AD0`` (`BD0`), and
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samples the SCL line on : the 8\ :sup:`th` pin of a port ``AD7`` (``BD7``).
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When a FTDI device without an open collector capability is used
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(FT2232H, FT4232H, FT4232HA) the current sourced from AD0 may prevent proper
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sampling ofthe SCL line when the slave attempts to strech the clock. It is
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When a FTDI device without an open collector capability is used (FT2232H,
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FT4232H/HA/HP) the current sourced from AD0 may prevent proper sampling of
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the SCL line when the slave attempts to strech the clock. It is
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therefore recommended to add a low forward voltage drop diode to `AD0` to
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prevent AD0 to source current to the SCL bus. See the wiring section.
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*Fig.1*:
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* ``D1`` is only required when clock streching is used along with
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FT2232H, FT4232H or FT4232HA devices. It should not be fit with an FT232H.
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FT2232H or FT4232H/HA/HP devices. It should not be fit with
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an FT232H.
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* ``AD7`` may be used as a regular GPIO with clock stretching is not required.

pyftdi/doc/api/spi.rst

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Support for mode 1 and mode 3 is implemented with some workarounds, but
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generated signals may not be reliable: YMMV. It is only available with -H
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series (232H, 2232H, 4232H, 4232HA).
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series (FT232H, FT2232H, FT4232H/HA/HP).
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The 3-clock phase mode which has initially be designed to cope with |I2C|
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signalling is used to delay the data lines from the clock signals. A direct

pyftdi/doc/authors.rst

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* Alessandro Zini
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* Sjoerd Simons
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* David Schneider
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* Christophe Leblanc

pyftdi/doc/defs.rst

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.. _FT2232H: https://www.ftdichip.com/Products/ICs/FT2232H.html
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.. _FT4232H: https://www.ftdichip.com/Products/ICs/FT4232H.htm
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.. _FT4232HA: http://ftdichip.com/products/ft4232haq/
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.. _FT4232HP: https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT4233HP.pdf
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.. _FTDI_Recovery: https://www.ftdichip.com/Support/Documents/AppNotes/AN_136%20Hi%20Speed%20Mini%20Module%20EEPROM%20Disaster%20Recovery.pdf
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.. _PyFtdi: https://www.github.com/eblot/pyftdi
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.. _PyFtdiTools: https://github.com/eblot/pyftdi/tree/master/pyftdi/bin

pyftdi/doc/features.rst

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|I2C| master
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````````````
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Supported devices: FT232H_, FT2232H_, FT4232H_, FT4232HA_
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Supported devices: FT232H_, FT2232H_, FT4232H_, FT4232HA_, FT4232HP_
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For now, only 7-bit addresses are supported.
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pyftdi/doc/gpio.rst

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`BDBUS/BCBUS`,
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* FT2232H features two ports, which are 16-bit wide each: `ADBUS/ACBUS` and
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`BDBUS/BCBUS`,
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* FT4232H/FT4232HA features four ports, which are 8-bit wide each: `ADBUS`,
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* FT4232H/HA/HP features four ports, which are 8-bit wide each: `ADBUS`,
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`BDBUS`, `CDBUS` and `DDBUS`,
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* FT230X features a single port, which is 4-bit wide,
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* FT231X feature a single port, which is 8-bit wide

pyftdi/doc/index.rst

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* FT2232C/D (dual port, clock up to 6 MHz)
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* FT232H (single port, clock up to 30 MHz)
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* FT2232H (dual port, clock up to 30 MHz)
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* FT4232H (quad port, clock up to 30 MHz)
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* FT4232HA (quad port, clock up to 30 MHz)
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* FT4232H/HA/HP (quad port, clock up to 30 MHz)
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Features
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--------

pyftdi/doc/installation.rst

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SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="6015", GROUP="plugdev", MODE="0664"
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# FT4232HA
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SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="6048", GROUP="plugdev", MODE="0664"
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# FT4232HP
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SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="6043", GROUP="plugdev", MODE="0664"
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.. note:: **Accessing FTDI devices with custom VID/PID**
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stored in the FTDI EEPROM.
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* With FTDI devices with multiple channels, such as FT2232 (2 channels) and
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FT4232 (4 channels), you **must** install the driver for the composite
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FT4232H/HA/HP (4 channels), you **must** install the driver for the composite
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parent, **not** for the individual interfaces. If you install the driver
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for each interface, each interface will be presented as a unique FTDI
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device and you may have difficulties to select a specific FTDI device port

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