ESP32-C5 Rev 1.2 CPU permanently throttled to 160 MHz when Flash Encryption is enabled (IDFGH-18186)

[Haerteleric]

Answers checklist.

• I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
• I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
• I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.

6.0.1

Espressif SoC revision.

ESP32-C5 (Rev 1.2)

Operating System used.

Linux

How did you build your project?

VS Code IDE

If you are using Windows, please specify command line type.

None

Development Kit.

Custom

Power Supply used.

USB

What is the expected behavior?

With Flash Encryption enabled, the CPU should operate at its maximum frequency of 240 MHz during normal execution and dynamically scale down to 160 MHz only when executing an encrypted flash write, then return to 240 MHz afterward.

What is the actual behavior?

The CPU frequency is permanently locked at 160 MHz when Flash Encryption is enabled, preventing the chip from running at 240 MHz at all.

240 MHz option in sdkconfig not available

Steps to reproduce.

1. Configure an ESP-IDF project for target esp32c5 (Revision 1.2).
2. Set the default CPU frequency to 240 MHz in menuconfig.
3. Enable Flash Encryption in menuconfig (Security features -> Enable flash encryption on boot).
4. Build, flash, and boot the device.
5. Check the CPU frequency at runtime (e.g., via esp_clk_cpu_freq()) and observe that it is fixed at 160000000 Hz.

Debug Logs.

I (1869) cpu_start: Pro cpu start user code
I (1870) cpu_start: cpu freq: 160000000 Hz

Diagnostic report archive.

No response

More Information.

No response

[wanckl]

@Haerteleric

some issue is founded temporary, so config option is disabled now

can see errata here https://docs.espressif.com/projects/esp-chip-errata/en/latest/esp32c5/03-errata-description/esp32c5/flash-manual-encryption-failure.html

If you don't mass product, can back to commit 7145fc9, but maybe potential unknown risk.

when issue fixed, 240M will support again, thanks

[Haerteleric]

But the Help-Text says:

When 240MHz is selected, esp_flash_write_encrypted() will automatically limit CPU frequency during
          execution:
          - v1.2 and above chips: limited to 160MHz
          - v1.0 and below chips: limited to 80MHz
          When 160MHz or lower is selected, no frequency limiting occurs during encrypted writes.

This implies to me that the CPU would limit frequency by itself on critical conditions. I would be fine with that.
But i can't really live with permantent downclock to 160mhz

[wanckl]

@Haerteleric yeah, I can understand, maybe it's a temporary state so not full update all notes

you can back to the commit I mentioned above for 240M use.

but hi @mahavirj, do you know what actual issue prevent dynamic freq to work?