ARM / Apple Silicon support via `CNTVCT_EL0` system register

[fior512]

Motivation

Latte currently compiles only on x86_64 (RDTSC/RDTSCP). ARM64 (Apple M-series, AWS Graviton, Raspberry Pi) is now a first-class server and dev platform. A single-header library should run everywhere without code changes.

Technical Approach

ARM64 exposes a 64-bit virtual counter at ~nanosecond resolution via the CNTVCT_EL0 system register, readable from user-space:

#if defined(__aarch64__)
inline uint64_t read_counter() {
    uint64_t val;
    asm volatile("mrs %0, cntvct_el0" : "=r"(val));
    return val;
}
// Serialization: isb (instruction synchronization barrier)
inline uint64_t read_counter_serialized() {
    asm volatile("isb" ::: "memory");
    uint64_t val;
    asm volatile("mrs %0, cntvct_el0" : "=r"(val));
    return val;
}
#endif

CNTFRQ_EL0 gives the counter frequency for LATTE_FREQ-style calibration.

Acceptance Criteria

• Intrinsic:: namespace extended with ARM64 implementations behind #if defined(__aarch64__)
• LATTE_FREQ works on ARM using CNTFRQ_EL0 or the existing CLOCK_MONOTONIC_RAW path
• Hard/Mid/Fast mode semantics mapped to appropriate barrier levels (isb / none)
• Compiles cleanly on GCC and Clang for aarch64-linux-gnu and Apple arm64
• CI / justfile updated with an ARM cross-compile check
• README updated to document the platform matrix