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Merge pull request #10 from 1190201122/fix-conv1d-prepack
Fix conv1d prepack(slot_mapping / conv1d_prepack / mm_ar_rmsnorm)
2 parents b1f9676 + 7a6c863 commit 6bef27b

17 files changed

Lines changed: 1084 additions & 12 deletions

start_qwen3.6-27b_aclnn_graph.sh

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#!/bin/bash
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# New test: aclnn chunk_gated_delta_rule, graph mode
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=1
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# 3 features: all ON
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export VLLM_FL_DISABLE_CONV1D_PREPACK=0
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export VLLM_FL_ENABLE_MM_AR_RMSNORM=1
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export VLLM_FL_DISABLE_NPU_SLOT_MAPPING=0
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echo "=========================================="
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echo " Running with aclnn chunk_gated_delta_rule, graph mode"
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echo "=========================================="
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echo "VLLM_FL_USE_ACLNN_CHUNK_GDN=${VLLM_FL_USE_ACLNN_CHUNK_GDN}"
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echo "VLLM_FL_DISABLE_CONV1D_PREPACK=${VLLM_FL_DISABLE_CONV1D_PREPACK}"
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echo "VLLM_FL_ENABLE_MM_AR_RMSNORM=${VLLM_FL_ENABLE_MM_AR_RMSNORM}"
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echo "VLLM_FL_DISABLE_NPU_SLOT_MAPPING=${VLLM_FL_DISABLE_NPU_SLOT_MAPPING}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-27B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-27b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256;4096,1024,256;16384,1024,256;65536,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 0,1,2,3 \
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--port 8122 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label aclnn_chunk_3feat_on_c64_4case_i1k_4k_16k_64k_graph_noprof

start_qwen3.6-35b_aclnn_graph.sh

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#!/bin/bash
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# New test: aclnn chunk_gated_delta_rule, graph mode (35B-A3B)
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=1
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# features: slot_mapping ON only (conv1d_prepack OFF, mm_ar_rmsnorm OFF)
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export VLLM_FL_DISABLE_CONV1D_PREPACK=1
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export VLLM_FL_ENABLE_MM_AR_RMSNORM=0
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export VLLM_FL_DISABLE_NPU_SLOT_MAPPING=0
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echo "=========================================="
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echo " Running with aclnn chunk_gated_delta_rule, graph mode (35B-A3B)"
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echo "=========================================="
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echo "VLLM_FL_USE_ACLNN_CHUNK_GDN=${VLLM_FL_USE_ACLNN_CHUNK_GDN}"
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echo "VLLM_FL_DISABLE_CONV1D_PREPACK=${VLLM_FL_DISABLE_CONV1D_PREPACK}"
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echo "VLLM_FL_ENABLE_MM_AR_RMSNORM=${VLLM_FL_ENABLE_MM_AR_RMSNORM}"
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echo "VLLM_FL_DISABLE_NPU_SLOT_MAPPING=${VLLM_FL_DISABLE_NPU_SLOT_MAPPING}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256;4096,1024,256;16384,1024,256;65536,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 4,5,6,7 \
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--port 8123 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label slot_on_c64_4case_i1k_4k_16k_64k_graph_noprof
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#!/bin/bash
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# New test: aclnn chunk_gated_delta_rule, graph mode (35B-A3B, 1k case only)
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=1
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echo "=========================================="
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echo " Running with aclnn chunk_gated_delta_rule, graph mode (35B-A3B, 1k case)"
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echo "=========================================="
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echo "VLLM_FL_USE_ACLNN_CHUNK_GDN=${VLLM_FL_USE_ACLNN_CHUNK_GDN}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 4,5,6,7 \
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--port 8123 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label aclnn_chunk_c64_i1024_o1024_np256_gpu47_graph_noprof
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#!/bin/bash
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# New test: aclnn chunk_gated_delta_rule, graph mode (35B-A3B, 1k case, gpu0-3)
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=1
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echo "=========================================="
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echo " Running with aclnn chunk_gated_delta_rule, graph mode (35B-A3B, 1k case, gpu0-3)"
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echo "=========================================="
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echo "VLLM_FL_USE_ACLNN_CHUNK_GDN=${VLLM_FL_USE_ACLNN_CHUNK_GDN}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 0,1,2,3 \
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--port 8122 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label aclnn_chunk_c64_i1024_o1024_np256_gpu03_graph_noprof
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#!/bin/bash
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# aclnn chunk_gated_delta_rule, graph mode (35B-A3B), 3 features all OFF
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=1
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# 3 features: all OFF
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export VLLM_FL_DISABLE_CONV1D_PREPACK=1
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export VLLM_FL_ENABLE_MM_AR_RMSNORM=0
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export VLLM_FL_DISABLE_NPU_SLOT_MAPPING=1
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echo "=========================================="
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echo " Running with aclnn chunk_gated_delta_rule, graph mode (35B-A3B, 3feat OFF)"
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echo "=========================================="
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echo "VLLM_FL_USE_ACLNN_CHUNK_GDN=${VLLM_FL_USE_ACLNN_CHUNK_GDN}"
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echo "VLLM_FL_DISABLE_CONV1D_PREPACK=${VLLM_FL_DISABLE_CONV1D_PREPACK}"
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echo "VLLM_FL_ENABLE_MM_AR_RMSNORM=${VLLM_FL_ENABLE_MM_AR_RMSNORM}"
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echo "VLLM_FL_DISABLE_NPU_SLOT_MAPPING=${VLLM_FL_DISABLE_NPU_SLOT_MAPPING}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256;4096,1024,256;16384,1024,256;65536,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 0,1,2,3 \
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--port 8122 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label aclnn_chunk_3feat_off_c64_4case_i1k_4k_16k_64k_graph_noprof
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#!/bin/bash
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# Baseline test: PTO + Triton (current implementation), graph mode (35B-A3B)
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=0
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echo "=========================================="
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echo " Running Baseline (PTO + Triton), graph mode (35B-A3B)"
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echo "=========================================="
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echo "VLLM_FL_USE_ACLNN_CHUNK_GDN=${VLLM_FL_USE_ACLNN_CHUNK_GDN}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 4,5,6,7 \
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--port 8123 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label baseline_pto_c64_i1024_o1024_np256_gpu47_graph_noprof
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#!/bin/bash
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# Baseline test: PTO + Triton (current implementation), graph mode (35B-A3B, gpu0-3)
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=0
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echo "=========================================="
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echo " Running Baseline (PTO + Triton), graph mode (35B-A3B, gpu0-3)"
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echo "=========================================="
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echo "VLLM_FL_USE_ACLNN_CHUNK_GDN=${VLLM_FL_USE_ACLNN_CHUNK_GDN}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 0,1,2,3 \
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--port 8122 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label baseline_pto_c64_i1024_o1024_np256_gpu03_graph_noprof
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#!/bin/bash
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# slot_mapping ON + conv1d_prepack ON (35B-A3B, gpu0-3)
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=1
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# features: slot_mapping ON, conv1d_prepack ON, mm_ar_rmsnorm OFF
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export VLLM_FL_DISABLE_CONV1D_PREPACK=0
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export VLLM_FL_ENABLE_MM_AR_RMSNORM=0
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export VLLM_FL_DISABLE_NPU_SLOT_MAPPING=0
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echo "=========================================="
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echo " slot_mapping ON + conv1d_prepack ON (35B-A3B)"
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echo "=========================================="
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echo "VLLM_FL_DISABLE_CONV1D_PREPACK=${VLLM_FL_DISABLE_CONV1D_PREPACK}"
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echo "VLLM_FL_ENABLE_MM_AR_RMSNORM=${VLLM_FL_ENABLE_MM_AR_RMSNORM}"
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echo "VLLM_FL_DISABLE_NPU_SLOT_MAPPING=${VLLM_FL_DISABLE_NPU_SLOT_MAPPING}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256;4096,1024,256;16384,1024,256;65536,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
28+
--tp 4 \
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--gmem 0.9 \
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--devices 0,1,2,3 \
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--port 8122 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label slot_conv1d_on_c64_4case_i1k_4k_16k_64k_graph_noprof

start_qwen3.6-35b_slot_mmar_on.sh

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#!/bin/bash
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# slot_mapping ON + mm_ar_rmsnorm ON (35B-A3B, gpu4-7)
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# mm fusion threshold: M > 512 (VLLM_FL_MM_AR_RMSNORM_MIN_TOKENS).
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# Rationale: decode steps have M <= concurrency (64) and must NOT fuse
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# (the extra add_out all-gather cancels the win at small M); prefill chunks
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# (up to 2048) fuse only above 512, same as the tuned npugraph_ex pass.
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export VLLM_FL_USE_ACLNN_CHUNK_GDN=1
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# features: slot_mapping ON, conv1d_prepack OFF, mm_ar_rmsnorm ON
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export VLLM_FL_DISABLE_CONV1D_PREPACK=1
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export VLLM_FL_ENABLE_MM_AR_RMSNORM=1
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export VLLM_FL_DISABLE_NPU_SLOT_MAPPING=0
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export VLLM_FL_MM_AR_RMSNORM_MIN_TOKENS=512
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echo "=========================================="
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echo " slot_mapping ON + mm_ar_rmsnorm ON (35B-A3B)"
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echo "=========================================="
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echo "VLLM_FL_DISABLE_CONV1D_PREPACK=${VLLM_FL_DISABLE_CONV1D_PREPACK}"
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echo "VLLM_FL_ENABLE_MM_AR_RMSNORM=${VLLM_FL_ENABLE_MM_AR_RMSNORM}"
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echo "VLLM_FL_DISABLE_NPU_SLOT_MAPPING=${VLLM_FL_DISABLE_NPU_SLOT_MAPPING}"
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echo "VLLM_FL_MM_AR_RMSNORM_MIN_TOKENS=${VLLM_FL_MM_AR_RMSNORM_MIN_TOKENS}"
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echo ""
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/workspace/scripts/run_vllm_fl_profile_unified.sh \
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--model-path /models/Qwen3.6-35B-A3B \
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--model-name qwen3.6 \
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--model-tag qwen3.6-35b-a3b \
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--mode graph \
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--cudagraph-mode FULL \
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--cases "1024,1024,256;4096,1024,256;16384,1024,256;65536,1024,256" \
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--concurrency 64 \
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--max-num-seqs 64 \
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--max-model-len 131072 \
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--tp 4 \
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--gmem 0.9 \
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--devices 4,5,6,7 \
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--port 8123 \
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--no-bench-profile \
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--skip-analyse \
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--package none \
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--run-label slot_mmar_on_c64_4case_i1k_4k_16k_64k_graph_noprof

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