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Register File

There are 24 registers available in the Retroputer CPU numbered r0 through r23. These registers are either sixteen bits wide (even registers) or eight bytes wide (odd registers). The low even register bytes are the same as the odd register bytes meaning that it is possible to access just the low bytes or the high bytes of a sixteen bit register.

In machine language, the access to an even register is always assumed to be a sixteen bit request. As such, it is not possible to directly access the high level bytes of an even register as if it were an eight bit register.

The odd registers are always assumed to be eight bit requests.

Important

  • Changing the value of an even register will directly influence the value of the corresponding odd register and vice versa.
  • The type of register access in an instruction opcode will determine the size of any memory request, including immediate access. For example, LD A, [0x02000] will request two bytes (one word) from memory at address location 0x02000. LD AL, [0x02000] will only request one byte from the same location.
Alias Index Encoding Size Description
A 0 0000 16 General purpose register, often used as the first parameter to a subroutine.
AL 1 0001 8 Lower eight bits of A.
B 2 0010 16 General purpose register. Often used as the second parameter to a subroutine.
BL 3 0011 8 Lower eight bits of B.
C 4 0100 16 General purpose register. Often used for counting, as part of LOOPs.
CL 5 0101 8 Lower eight bits of C.
D 6 0110 16 General purpose register. Used by D-relative addressing.
DL 7 0111 8 Lower eight bits of D.
X 8 1000 16 Index register. Often used as a general purpose register, but not all instructions can operate directly on X. Used as an offset in absolute and indirect addressing modes.
Y 10 1010 16 Index register. Works mostly the same as X, except the index is applied after the indirect address is computed.
BP 12 1100 16 Base Pointer. Used to denote the bottom of a stack frame.
SP 14 1110 16 Stack Pointer. Used to denote the top of the stack.
IRQ+FLAGS 16 16 Includes the currently-processing IRQ and the flags.
FLAGS 17 8 Indicates the current state of the various processor flags.
PC 18 16 Program Counter – points to the instruction about to be executed.
MM 20 16 The Memory Map register controls the banking of pages 1–3. The default configuration is 74C1.
MP 22 16 The Memory Pointer points to the next byte to be read when parsing an instruction.