Fix 16-bit MOVSX MOVZX MOVSXD semantics

Progress report:\n- Added missing 16-bit operand-size MOVZX/MOVSX selectors for GPRv_GPR16 and MEMw forms.\n- Corrected MOVSXD 16-bit operand-size semantics to write a 16-bit destination instead of incorrectly zero-extending through a 32-bit destination.\n- Corrected non-REX.W 32-bit MOVSXD forms to write 32-bit destinations instead of sign-extending into 64-bit registers.\n\nVerification from remill-tester release build:\n- cmake --build build-release --target remill-tester -j4\n- ./build-release/remill-tester --self-test\n- ./build-release/remill-tester 3975WX/movzx.txt --execute --stop-on-first-fail\n- ./build-release/remill-tester 3975WX/movsx.txt --execute --stop-on-first-fail\n- ./build-release/remill-tester 3975WX/movsxd.txt --execute --stop-on-first-fail\n\nResults:\n- self-test: ok.\n- movzx.txt: 75022 passed, 0 failed, 0 skipped.\n- movsx.txt: 113322 passed, 0 failed, 0 skipped.\n- movsxd.txt: 54256 passed, 0 failed, 0 skipped.

Author: mrexodia

lib/Arch/X86/Semantics/DATAXFER.cpp

@@ -1122,8 +1122,11 @@ IF_64BIT(DEF_ISEL(MOVZX_GPRv_MEMb_64) = MOVZX<R64W, M8>;)
 DEF_ISEL(MOVZX_GPRv_GPR8_16) = MOVZX<R16W, R8>;
 DEF_ISEL(MOVZX_GPRv_GPR8_32) = MOVZX<R32W, R8>;
 IF_64BIT(DEF_ISEL(MOVZX_GPRv_GPR8_64) = MOVZX<R64W, R8>;)
+DEF_ISEL(MOVZX_GPRv_MEMw_16) = MOVZX<R16W, M16>;
 DEF_ISEL(MOVZX_GPRv_MEMw_32) = MOVZX<R32W, M16>;
 IF_64BIT(DEF_ISEL(MOVZX_GPRv_MEMw_64) = MOVZX<R64W, M16>;)
+DEF_ISEL(MOVZX_GPRv_GPR16) = MOVZX<R16W, R16>;
+DEF_ISEL(MOVZX_GPRv_GPR16_16) = MOVZX<R16W, R16>;
 DEF_ISEL(MOVZX_GPRv_GPR16_32) = MOVZX<R32W, R16>;
 IF_64BIT(DEF_ISEL(MOVZX_GPRv_GPR16_64) = MOVZX<R64W, R16>;)
 DEF_ISEL(MOVZX_GPR16_MEMw) = MOVZX<R16W, M16>;
@@ -1136,21 +1139,24 @@ IF_64BIT(DEF_ISEL(MOVSX_GPRv_MEMb_64) = MOVSX<R64W, M8, int64_t>;)
 DEF_ISEL(MOVSX_GPRv_GPR8_16) = MOVSX<R16W, R8, int16_t>;
 DEF_ISEL(MOVSX_GPRv_GPR8_32) = MOVSX<R32W, R8, int32_t>;
 IF_64BIT(DEF_ISEL(MOVSX_GPRv_GPR8_64) = MOVSX<R64W, R8, int64_t>;)
+DEF_ISEL(MOVSX_GPRv_MEMw_16) = MOVSX<R16W, M16, int16_t>;
 DEF_ISEL(MOVSX_GPRv_MEMw_32) = MOVSX<R32W, M16, int32_t>;
 IF_64BIT(DEF_ISEL(MOVSX_GPRv_MEMw_64) = MOVSX<R64W, M16, int64_t>;)
 DEF_ISEL(MOVSX_GPR16_MEMw) = MOVSX<R16W, M16, int16_t>;
 DEF_ISEL(MOVSX_GPR32_MEMw) = MOVSX<R32W, M16, int32_t>;
 IF_64BIT(DEF_ISEL(MOVSX_GPR64_MEMw) = MOVSX<R64W, M16, int64_t>;)
 
+DEF_ISEL(MOVSX_GPRv_GPR16) = MOVSX<R16W, R16, int16_t>;
+DEF_ISEL(MOVSX_GPRv_GPR16_16) = MOVSX<R16W, R16, int16_t>;
 DEF_ISEL(MOVSX_GPRv_GPR16_32) = MOVSX<R32W, R16, int32_t>;
 IF_64BIT(DEF_ISEL(MOVSX_GPRv_GPR16_64) = MOVSX<R64W, R16, int64_t>;)
 
-DEF_ISEL(MOVSXD_GPRv_GPRz_16) = MOVSX<R32W, R16, int32_t>;
+DEF_ISEL(MOVSXD_GPRv_GPRz_16) = MOVSX<R16W, R16, int16_t>;
 DEF_ISEL(MOVSXD_GPRv_GPRz_32) = MOVSX<R32W, R32, int32_t>;
 
 IF_64BIT(DEF_ISEL(MOVSXD_GPR64_MEMd) = MOVSX<R64W, M32, int64_t>;)
-IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMd_32) = MOVSX<R64W, M32, int64_t>;)
-IF_64BIT(DEF_ISEL(MOVSXD_GPRv_GPR32_32) = MOVSX<R64W, R32, int64_t>;)
+IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMd_32) = MOVSX<R32W, M32, int32_t>;)
+IF_64BIT(DEF_ISEL(MOVSXD_GPRv_GPR32_32) = MOVSX<R32W, R32, int32_t>;)
 
 IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMd_64) = MOVSX<R64W, M32, int64_t>;)
 IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMz_64) = MOVSX<R64W, M32, int64_t>;)