Merge pull request #2956 from mabel-dev/remove-avx512

remove avx512

Author: joocer

opteryx/__version__.py

@@ -1,9 +1,9 @@
 # THIS FILE IS AUTOMATICALLY UPDATED DURING THE BUILD PROCESS
 # DO NOT EDIT THIS FILE DIRECTLY
 
-__build__ = 1947
+__build__ = 1951
 __author__ = "@joocer"
-__version__ = "0.26.2-beta.1947"
+__version__ = "0.26.2-beta.1951"
 
 # Store the version here so:
 # 1) we don't load dependencies by storing it in __init__.py

opteryx/compiled/simd_probe.pyx

@@ -9,7 +9,6 @@
 cdef extern from "simd_env.h":
     void opteryx_check_simd_env_or_abort()
     int opteryx_cpu_supports_avx2()
-    int opteryx_cpu_supports_avx512()
     int opteryx_cpu_supports_neon()
 
 def check_env_or_abort():
@@ -21,18 +20,15 @@ def check_env_or_abort():
 def cpu_supports_avx2() -> bool:
     return bool(opteryx_cpu_supports_avx2())
 
-def cpu_supports_avx512() -> bool:
-    return bool(opteryx_cpu_supports_avx512())
-
 def cpu_supports_neon() -> bool:
     return bool(opteryx_cpu_supports_neon())
 
+
+
 def cpu_architecture() -> list:
     architecture = []
     if cpu_supports_avx2():
         architecture.append("AVX2")
-    if cpu_supports_avx512():
-        architecture.append("AVX512")
     if cpu_supports_neon():
         architecture.append("NEON")
     return architecture

pyproject.toml

@@ -1,6 +1,6 @@
 [project]
 name = "opteryx"
-version = "0.26.2-beta.1947"
+version = "0.26.2-beta.1951"
 description = "Query your data, where it lives"
 requires-python = '>=3.11'
 readme = {file = "README.md", content-type = "text/markdown"}

setup.py

@@ -5,7 +5,6 @@
 import glob
 import os
 import platform
-import subprocess
 import sys
 
 import numpy
@@ -46,32 +45,6 @@ def detect_architecture():
         return "x86_64"
     return machine
 
-
-def build_supports_avx512():
-    """Check at build time whether the local build machine supports AVX512.
-
-    We prefer a lightweight check from /proc/cpuinfo on Linux and use sysctl on
-    macOS if available. This prevents us from adding global AVX512 compile
-    flags when the build machine doesn't support them (which can cause
-    illegal instruction errors if a binary built with those flags runs on a
-    machine without AVX512).
-    """
-    if is_linux():
-        try:
-            with open('/proc/cpuinfo', 'r', encoding='utf8') as cpuinfo_file:
-                contents = cpuinfo_file.read()
-            return 'avx512f' in contents and 'avx512bw' in contents
-        except FileNotFoundError:
-            return False
-    if is_mac():
-        try:
-            # Attempt to use sysctl to query CPU features
-            out = subprocess.check_output(['sysctl', '-n', 'machdep.cpu.leaf7_features'], text=True)
-            return 'AVX512F' in out and 'AVX512BW' in out
-        except (subprocess.CalledProcessError, FileNotFoundError):
-            return False
-    return False
-
 # Compiler flags with SIMD support
 arch = detect_architecture()
 CPP_FLAGS = ["-O3", "-std=c++17"]
@@ -88,11 +61,6 @@ def build_supports_avx512():
 if arch == "x86_64":
     # Add SIMD support
     CPP_FLAGS.extend(["-msse4.2", "-mavx2"])
-    # Add AVX512 support only if the build host supports it. This keeps
-    # compilation portable and prevents the compiler from embedding AVX512 in
-    # scalar paths when the instruction set isn't available on the test runner.
-    if build_supports_avx512():
-        CPP_FLAGS.extend(["-mavx512f", "-mavx512cd", "-mavx512bw", "-mavx512dq", "-mavx512vl"])
 elif arch == "arm" and not is_mac():
     CPP_FLAGS.append("-mfpu=neon")
 

src/cpp/cpu_features.cpp

@@ -71,29 +71,6 @@ bool cpu_supports_avx2() {
 #endif
 }
 
-bool cpu_supports_avx512() {
-#if defined(__x86_64__) || defined(__i386__)
-#if (defined(__GNUC__) || defined(__clang__))
-    #ifdef __builtin_cpu_supports
-    if (__builtin_cpu_supports("avx512f") && __builtin_cpu_supports("avx512bw"))
-        return true;
-    #endif
-
-    #if defined(__linux__)
-    std::ifstream f("/proc/cpuinfo");
-    if (f) {
-        std::string contents((std::istreambuf_iterator<char>(f)), std::istreambuf_iterator<char>());
-        if (contents.find("avx512f") != std::string::npos && contents.find("avx512bw") != std::string::npos)
-            return true;
-    }
-    #endif
-#endif
-    return false;
-#else
-    return false;
-#endif
-}
-
 bool cpu_supports_neon() {
 #if defined(__arm__) || defined(__aarch64__)
     // On Linux, check HWCAP

src/cpp/cpu_features.h

@@ -7,7 +7,6 @@ extern "C" {
 #endif
 
 bool cpu_supports_avx2();
-bool cpu_supports_avx512();
 bool cpu_supports_neon();
 
 #ifdef __cplusplus

src/cpp/simd_bitops.cpp

@@ -5,7 +5,7 @@
 #include "simd_dispatch.h"
 #include "cpu_features.h"
 
-#if (defined(__AVX512F__) && defined(__AVX512BW__)) || defined(__AVX2__)
+#if defined(__AVX2__)
 #include <immintrin.h>
 #endif
 
@@ -24,19 +24,6 @@ static void simd_and_mask_scalar(uint8_t* dest, const uint8_t* a, const uint8_t*
     }
 }
 
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-static void simd_and_mask_avx512(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n) {
-    size_t i = 0;
-    for (; i + 64 <= n; i += 64) {
-        __m512i va = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(a + i));
-        __m512i vb = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(b + i));
-        __m512i result = _mm512_and_si512(va, vb);
-        _mm512_storeu_si512(reinterpret_cast<__m512i*>(dest + i), result);
-    }
-    for (; i < n; i++) dest[i] = a[i] & b[i];
-}
-#endif
-
 #if defined(__AVX2__)
 static void simd_and_mask_avx2(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n) {
     size_t i = 0;
@@ -67,10 +54,8 @@ void simd_and_mask(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n)
     using fn_t = void(*)(uint8_t*, const uint8_t*, const uint8_t*, size_t);
     static std::atomic<fn_t> cache{nullptr};
 
-    fn_t fn = simd::select_dispatch<fn_t>(cache, {
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-        { &cpu_supports_avx512, simd_and_mask_avx512 },
-#endif
+    #if defined(__AVX2__)
+        fn_t fn = simd::select_dispatch<fn_t>(cache, {
 #if defined(__AVX2__)
         { &cpu_supports_avx2, simd_and_mask_avx2 },
 #endif
@@ -91,19 +76,6 @@ static void simd_or_mask_scalar(uint8_t* dest, const uint8_t* a, const uint8_t*
     for (size_t i = 0; i < n; i++) dest[i] = a[i] | b[i];
 }
 
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-static void simd_or_mask_avx512(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n) {
-    size_t i = 0;
-    for (; i + 64 <= n; i += 64) {
-        __m512i va = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(a + i));
-        __m512i vb = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(b + i));
-        __m512i result = _mm512_or_si512(va, vb);
-        _mm512_storeu_si512(reinterpret_cast<__m512i*>(dest + i), result);
-    }
-    for (; i < n; i++) dest[i] = a[i] | b[i];
-}
-#endif
-
 #if defined(__AVX2__)
 static void simd_or_mask_avx2(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n) {
     size_t i = 0;
@@ -134,10 +106,8 @@ void simd_or_mask(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n) {
     using fn_t = void(*)(uint8_t*, const uint8_t*, const uint8_t*, size_t);
     static std::atomic<fn_t> cache{nullptr};
 
+#if defined(__AVX2__)
     fn_t fn = simd::select_dispatch<fn_t>(cache, {
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-        { &cpu_supports_avx512, simd_or_mask_avx512 },
-#endif
 #if defined(__AVX2__)
         { &cpu_supports_avx2, simd_or_mask_avx2 },
 #endif
@@ -158,19 +128,6 @@ static void simd_xor_mask_scalar(uint8_t* dest, const uint8_t* a, const uint8_t*
     for (size_t i = 0; i < n; i++) dest[i] = a[i] ^ b[i];
 }
 
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-static void simd_xor_mask_avx512(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n) {
-    size_t i = 0;
-    for (; i + 64 <= n; i += 64) {
-        __m512i va = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(a + i));
-        __m512i vb = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(b + i));
-        __m512i result = _mm512_xor_si512(va, vb);
-        _mm512_storeu_si512(reinterpret_cast<__m512i*>(dest + i), result);
-    }
-    for (; i < n; i++) dest[i] = a[i] ^ b[i];
-}
-#endif
-
 #if defined(__AVX2__)
 static void simd_xor_mask_avx2(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n) {
     size_t i = 0;
@@ -201,10 +158,8 @@ void simd_xor_mask(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n)
     using fn_t = void(*)(uint8_t*, const uint8_t*, const uint8_t*, size_t);
     static std::atomic<fn_t> cache{nullptr};
 
+#if defined(__AVX2__)
     fn_t fn = simd::select_dispatch<fn_t>(cache, {
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-        { &cpu_supports_avx512, simd_xor_mask_avx512 },
-#endif
 #if defined(__AVX2__)
         { &cpu_supports_avx2, simd_xor_mask_avx2 },
 #endif
@@ -225,19 +180,6 @@ static void simd_not_mask_scalar(uint8_t* dest, const uint8_t* src, size_t n) {
     for (size_t i = 0; i < n; i++) dest[i] = ~src[i];
 }
 
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-static void simd_not_mask_avx512(uint8_t* dest, const uint8_t* src, size_t n) {
-    size_t i = 0;
-    __m512i all_ones = _mm512_set1_epi8(static_cast<char>(0xFF));
-    for (; i + 64 <= n; i += 64) {
-        __m512i v = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(src + i));
-        __m512i result = _mm512_xor_si512(v, all_ones);
-        _mm512_storeu_si512(reinterpret_cast<__m512i*>(dest + i), result);
-    }
-    for (; i < n; i++) dest[i] = ~src[i];
-}
-#endif
-
 #if defined(__AVX2__)
 static void simd_not_mask_avx2(uint8_t* dest, const uint8_t* src, size_t n) {
     size_t i = 0;
@@ -267,10 +209,8 @@ void simd_not_mask(uint8_t* dest, const uint8_t* src, size_t n) {
     using fn_t = void(*)(uint8_t*, const uint8_t*, size_t);
     static std::atomic<fn_t> cache{nullptr};
 
+#if defined(__AVX2__)
     fn_t fn = simd::select_dispatch<fn_t>(cache, {
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-        { &cpu_supports_avx512, simd_not_mask_avx512 },
-#endif
 #if defined(__AVX2__)
         { &cpu_supports_avx2, simd_not_mask_avx2 },
 #endif
@@ -330,24 +270,6 @@ static void simd_select_bytes_scalar(uint8_t* dest, const uint8_t* mask,
     for (size_t i = 0; i < n; i++) dest[i] = mask[i] ? a[i] : b[i];
 }
 
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-static void simd_select_bytes_avx512(uint8_t* dest, const uint8_t* mask,
-                                     const uint8_t* a, const uint8_t* b, size_t n) {
-    size_t i = 0;
-    __m512i zero = _mm512_setzero_si512();
-
-    for (; i + 64 <= n; i += 64) {
-        __m512i vm = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(mask + i));
-        __m512i va = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(a + i));
-        __m512i vb = _mm512_loadu_si512(reinterpret_cast<const __m512i*>(b + i));
-        __mmask64 m = _mm512_cmpneq_epu8_mask(vm, zero);
-        __m512i result = _mm512_mask_blend_epi8(m, vb, va);
-        _mm512_storeu_si512(reinterpret_cast<__m512i*>(dest + i), result);
-    }
-    for (; i < n; i++) dest[i] = mask[i] ? a[i] : b[i];
-}
-#endif
-
 #if defined(__AVX2__)
 static void simd_select_bytes_avx2(uint8_t* dest, const uint8_t* mask,
                                    const uint8_t* a, const uint8_t* b, size_t n) {
@@ -371,10 +293,8 @@ void simd_select_bytes(uint8_t* dest, const uint8_t* mask,
     using fn_t = void(*)(uint8_t*, const uint8_t*, const uint8_t*, const uint8_t*, size_t);
     static std::atomic<fn_t> cache{nullptr};
 
+#if defined(__AVX2__)
     fn_t fn = simd::select_dispatch<fn_t>(cache, {
-#if defined(__AVX512F__) && defined(__AVX512BW__)
-        { &cpu_supports_avx512, simd_select_bytes_avx512 },
-#endif
 #if defined(__AVX2__)
         { &cpu_supports_avx2, simd_select_bytes_avx2 },
 #endif

src/cpp/simd_bitops.h

@@ -10,7 +10,7 @@ extern "C" {
 
 /**
  * SIMD-accelerated bitwise AND operation on byte arrays.
- * Processes 64 bytes at once on AVX512, 32 on AVX2, 16 on NEON.
+ * Processes 32 bytes at a time on AVX2, 16 on NEON.
  * 
  * @param dest Destination buffer (can be same as a or b for in-place)
  * @param a First input buffer
@@ -21,7 +21,7 @@ void simd_and_mask(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n);
 
 /**
  * SIMD-accelerated bitwise OR operation on byte arrays.
- * Processes 64 bytes at once on AVX512, 32 on AVX2, 16 on NEON.
+ * Processes 32 bytes at a time on AVX2, 16 on NEON.
  * 
  * @param dest Destination buffer (can be same as a or b for in-place)
  * @param a First input buffer
@@ -32,7 +32,7 @@ void simd_or_mask(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n);
 
 /**
  * SIMD-accelerated bitwise XOR operation on byte arrays.
- * Processes 64 bytes at once on AVX512, 32 on AVX2, 16 on NEON.
+ * Processes 32 bytes at a time on AVX2, 16 on NEON.
  * 
  * @param dest Destination buffer (can be same as a or b for in-place)
  * @param a First input buffer
@@ -43,7 +43,7 @@ void simd_xor_mask(uint8_t* dest, const uint8_t* a, const uint8_t* b, size_t n);
 
 /**
  * SIMD-accelerated bitwise NOT operation on byte array.
- * Processes 64 bytes at once on AVX512, 32 on AVX2, 16 on NEON.
+ * Processes 32 bytes at a time on AVX2, 16 on NEON.
  * 
  * @param dest Destination buffer (can be same as src for in-place)
  * @param src Source buffer