@@ -99,17 +99,19 @@ ROM_START( m68hc705c8a )
9999ROM_END
100100
101101
102- // constexpr u16 M68HC05_VECTOR_SPI = 0xfff4;
103- // constexpr u16 M68HC05_VECTOR_SCI = 0xfff6;
102+ constexpr u16 M68HC05_VECTOR_F4 = 0xfff4 ;
103+ constexpr u16 M68HC05_VECTOR_F6 = 0xfff6 ;
104104constexpr u16 M68HC05_VECTOR_TIMER = 0xfff8 ;
105105constexpr u16 M68HC05_VECTOR_IRQ = 0xfffa ;
106106constexpr u16 M68HC05_VECTOR_SWI = 0xfffc ;
107107// constexpr u16 M68HC05_VECTOR_RESET = 0xfffe;
108108
109109constexpr u16 M68HC05_INT_IRQ = u16 (1 ) << 0 ;
110110constexpr u16 M68HC05_INT_TIMER = u16 (1 ) << 1 ;
111+ constexpr u16 M68HC05_INT_F4 = u16 (1 ) << 2 ;
112+ constexpr u16 M68HC05_INT_F6 = u16 (1 ) << 3 ;
111113
112- constexpr u16 M68HC05_INT_MASK = M68HC05_INT_IRQ | M68HC05_INT_TIMER ;
114+ constexpr u16 M68HC05_INT_MASK = M68HC05_INT_IRQ | M68HC05_INT_TIMER | M68HC05_INT_F4 | M68HC05_INT_F6 ;
113115
114116} // anonymous namespace
115117
@@ -432,6 +434,7 @@ void m68hc05_device::spcr_w(u8 data)
432434 m_spsr_seen &= 0xc0 ;
433435 }
434436 m_spcr = data & 0xdf ;
437+ update_spi_irq ();
435438}
436439
437440u8 m68hc05_device::spsr_r ()
@@ -447,6 +450,7 @@ u8 m68hc05_device::spdr_r()
447450 {
448451 m_spsr &= ~(m_spsr_seen & 0xc0 );
449452 m_spsr_seen &= 0x10 ;
453+ update_spi_irq ();
450454 }
451455 return m_spdr;
452456}
@@ -457,6 +461,7 @@ void m68hc05_device::spdr_w(u8 data)
457461 {
458462 m_spsr &= ~(m_spsr_seen & 0xc0 );
459463 m_spsr_seen &= 0x10 ;
464+ update_spi_irq ();
460465 }
461466 m_spdr = data;
462467}
@@ -491,6 +496,7 @@ u8 m68hc05_device::sccr2_r()
491496void m68hc05_device::sccr2_w (u8 data)
492497{
493498 m_sccr2 = data;
499+ update_sci_irq ();
494500}
495501
496502u8 m68hc05_device::scsr_r ()
@@ -506,6 +512,7 @@ u8 m68hc05_device::scdr_r()
506512 {
507513 m_scsr &= ~(m_scsr_seen & 0x3e );
508514 m_scsr_seen &= 0xc0 ;
515+ update_sci_irq ();
509516 }
510517 return m_scdr;
511518}
@@ -516,6 +523,7 @@ void m68hc05_device::scdr_w(u8 data)
516523 {
517524 m_scsr &= ~(m_scsr_seen & 0xc0 );
518525 m_scsr_seen &= 0x3e ;
526+ update_sci_irq ();
519527 }
520528 m_scdr = data;
521529}
@@ -757,6 +765,24 @@ void m68hc05_device::interrupt()
757765 else
758766 rm16<false >(M68HC05_VECTOR_TIMER & m_params.m_vector_mask , m_pc);
759767 }
768+ else if (m_pending_interrupts & M68HC05_INT_F6 )
769+ {
770+ LOGINT (" servicing SCI interrupt\n " );
771+ standard_irq_callback (2 , m_pc.w .l );
772+ if (m_params.m_addr_width > 13 )
773+ rm16<true >(M68HC05_VECTOR_F6 & m_params.m_vector_mask , m_pc);
774+ else
775+ rm16<false >(M68HC05_VECTOR_F6 & m_params.m_vector_mask , m_pc);
776+ }
777+ else if (m_pending_interrupts & M68HC05_INT_F4 )
778+ {
779+ LOGINT (" servicing SPI interrupt\n " );
780+ standard_irq_callback (3 , m_pc.w .l );
781+ if (m_params.m_addr_width > 13 )
782+ rm16<true >(M68HC05_VECTOR_F4 & m_params.m_vector_mask , m_pc);
783+ else
784+ rm16<false >(M68HC05_VECTOR_F4 & m_params.m_vector_mask , m_pc);
785+ }
760786 else
761787 {
762788 fatalerror (" m68hc05[%s]: unknown pending interrupt(s) %x" , tag (), m_pending_interrupts);
@@ -878,6 +904,23 @@ u8 m68hc05_device::port_value(unsigned offset) const
878904 return (m_port_latch[offset] & m_port_ddr[offset]) | (m_port_input[offset] & ~m_port_ddr[offset]);
879905}
880906
907+ void m68hc05_device::update_sci_irq ()
908+ {
909+ // OR is gated by RIE
910+ if ((m_scsr & m_sccr2 & 0xf0 ) || (BIT (m_scsr, 3 ) && BIT (m_sccr2, 5 )))
911+ m_pending_interrupts |= M68HC05_INT_F6 ;
912+ else
913+ m_pending_interrupts &= ~M68HC05_INT_F6 ;
914+ }
915+
916+ void m68hc05_device::update_spi_irq ()
917+ {
918+ if (BIT (m_spcr, 7 ) && (m_spsr & 0x90 ))
919+ m_pending_interrupts |= M68HC05_INT_F4 ;
920+ else
921+ m_pending_interrupts &= ~M68HC05_INT_F4 ;
922+ }
923+
881924void m68hc05_device::update_port_irq ()
882925{
883926 u8 state (0x00 );
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