namcos21: tweak video timing and some other clocks

Author: happppp

src/emu/xtal.cpp

@@ -462,7 +462,8 @@ const double XTAL::known_xtals[] = {
 	 36'000'000, // 36_MHz_XTAL            Sega Model 1 video board
 	 36'864'000, // 36.864_MHz_XTAL        Unidesa Cirsa Rock 'n' Roll
 	 37'980'000, // 37.98_MHz_XTAL         Falco 5220
-	 38'769'220, // 38.76922_MHz_XTAL      Namco System 21 video board
+	 38'769'220, // 38.76922_MHz_XTAL      Namco System 21 video board (C67 / Driver's Eyes)
+	 38'808'000, // 38.808_MHz_XTAL        Namco System 21 video board (Winning Run)
 	 38'863'630, // 38.86363_MHz_XTAL      Sharp X68000 15.98kHz video
 	 39'321'600, // 39.3216_MHz_XTAL       Sun 2/120
 	 39'710'000, // 39.71_MHz_XTAL         Wyse WY-60 132-column display clock

src/mame/namco/namcos21.cpp

@@ -38,6 +38,7 @@ is used to shade pixels according to their depth.
 TODO:
 - polygon glitches/flicker
 - is there a video_enable flag? or at least one for the bitmap layer (see screen transitions)
+- verify video timing, PCB videos do suggest exactly 60Hz
 - winrungp: some missing bitmap layer gfx due to underdumps of the gpu program roms (see attract mode
   when it's supposed to show "TRIANGLE" curve text, and the congratulations screen after winning)
 
@@ -830,7 +831,7 @@ void namcos21_state::winrun(machine_config &config)
 	MC6809E(config, m_audiocpu, 49.152_MHz_XTAL / 24); // Sound
 	m_audiocpu->set_addrmap(AS_PROGRAM, &namcos21_state::sound_map);
 
-	NAMCOC65(config, m_c65, 2048000);
+	NAMCOC65(config, m_c65, 49.152_MHz_XTAL / 24);
 	m_c65->in_pb_callback().set_ioport("MCUB");
 	m_c65->in_pc_callback().set_ioport("MCUC");
 	m_c65->in_ph_callback().set_ioport("MCUH");
@@ -873,8 +874,7 @@ void namcos21_state::winrun(machine_config &config)
 
 	// video hardware
 	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
-	// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace
-	m_screen->set_raw(49.152_MHz_XTAL / 4 * 2, 768, 0, 496, 264*2, 0, 480);
+	m_screen->set_raw(38.808_MHz_XTAL / 4 * 2, 616, 0, 496, 262 + 263, 0, 480); // x2 is for interlace
 	m_screen->set_screen_update(FUNC(namcos21_state::screen_update));
 	m_screen->set_palette(m_palette);
 

src/mame/namco/namcos21_c67.cpp

@@ -6,7 +6,7 @@ Namco System 21 (later hardware with 5 TMS320C25 DSPs)
 
 TODO:
 - lamp/vibration outputs, from MCU? (particularly starblad);
-- verify video timing, pixel clock is from 38.76922?;
+- verify video timing, it's assumed to be the same as namcos21 with a different XTAL;
 - mix_layer0_sprites can be improved when namcos21_3d_device removes the z-buffer, there are currently
   glitches in cybsled, eg. missile pickups behind pillars;
 - wrong global sprite layer offsets in service mode for all games except aircomb, it's fine in-game though;
@@ -17,6 +17,7 @@ Namco System 21 (later hardware with 5 TMS320C25 DSPs)
 - aircomb: may show glitches when pressing start at the intro sequence, it forgot to turn off video_enable?
   namcos21_dsp_c67_device::render_slave_output size mismatch also triggers here (not a regression);
 - aircomb: are the depthcue banks actually used? it looks fine with the depth cue embedded in palette;
+- solvalou: remove the ROM hack;
 - solvalou: service mode polygon test is crashy when testing invalid polygons (the good old IDC overflow);
 - solvalou: sprite blend is wrong during water stages (look at the blaster/score panel), the palette
   bank for the water is at 0x2200, but the blend palette is at 0x6000 instead of 0x6200?;
@@ -843,7 +844,7 @@ void namcos21_c67_state::namcos21(machine_config &config)
 	MC6809E(config, m_audiocpu, 49.152_MHz_XTAL / 24); // Sound
 	m_audiocpu->set_addrmap(AS_PROGRAM, &namcos21_c67_state::sound_map);
 
-	NAMCOC68(config, m_c68, 8000000);
+	NAMCOC68(config, m_c68, 49.152_MHz_XTAL / 6);
 	m_c68->in_pb_callback().set_ioport("MCUB");
 	m_c68->in_pc_callback().set_ioport("MCUC");
 	m_c68->in_ph_callback().set_ioport("MCUH");
@@ -872,8 +873,7 @@ void namcos21_c67_state::namcos21(machine_config &config)
 
 	// video hardware
 	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
-	// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace
-	m_screen->set_raw(49.152_MHz_XTAL / 4 * 2, 768, 0, 496, 264*2, 0, 480);
+	m_screen->set_raw(38.76922_MHz_XTAL / 4 * 2, 616, 0, 496, 262 + 263, 0, 480); // x2 is for interlace
 	m_screen->set_screen_update(FUNC(namcos21_c67_state::screen_update));
 	m_screen->set_palette(m_palette);
 

src/mame/namco/namcos21_de.cpp

@@ -5,7 +5,7 @@
 Driver's Eyes
     not yet working
 
-see http://www.tvspels-nostalgi.com/driverseye.htm for details about setup
+see http://www.tvspels-nostalgi.com/driverseye.htm for details about setup (go to archive.org)
 
 2008/06/11, by Naibo(translated to English by Mameplus team):
 
@@ -20,6 +20,7 @@ see http://www.tvspels-nostalgi.com/driverseye.htm for details about setup
 TODO:
 - add communications for Left and Right screen (linked C139 or something else?)
 - same flickering polygon glitches as namcos21.cpp
+- verify video timing, it's assumed to be the same as namcos21 with a different XTAL
 - are the left and right PCB sound outputs N/C?
 
 */
@@ -161,10 +162,10 @@ void namco_de_pcbstack_device::device_add_mconfig(machine_config &config)
 	M68000(config, m_slave, 49.152_MHz_XTAL / 4); // Slave
 	m_slave->set_addrmap(AS_PROGRAM, &namco_de_pcbstack_device::driveyes_slave_map);
 
-	MC6809E(config, m_audiocpu, 3072000); // Sound
+	MC6809E(config, m_audiocpu, 49.152_MHz_XTAL / 24); // Sound
 	m_audiocpu->set_addrmap(AS_PROGRAM, &namco_de_pcbstack_device::sound_map);
 
-	NAMCOC68(config, m_c68, 8000000);
+	NAMCOC68(config, m_c68, 49.152_MHz_XTAL / 6);
 	m_c68->in_pb_callback().set_ioport("MCUB");
 	m_c68->in_pc_callback().set_ioport("MCUC");
 	m_c68->in_ph_callback().set_ioport("MCUH");
@@ -203,8 +204,7 @@ void namco_de_pcbstack_device::device_add_mconfig(machine_config &config)
 
 	// video hardware
 	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
-	// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace
-	m_screen->set_raw(49.152_MHz_XTAL / 4 * 2, 768, 0, 496, 264*2, 0, 480);
+	m_screen->set_raw(38.76922_MHz_XTAL / 4 * 2, 616, 0, 496, 262 + 263, 0, 480); // x2 is for interlace
 	m_screen->set_screen_update(FUNC(namco_de_pcbstack_device::screen_update));
 	m_screen->set_palette(m_palette);