nakajies: Complete the emulation and mark working (#15407)

* Initial work, make all the nakajies machines work.

Connect serial device
Connect parallel device
Connect PCMCIA
Get sound working using the beeper device
Add Home binding to the normal power-on path
Fix periodic timer
Fix RAM/ROM mapping which prevented formatting internal memory/cards
Don't force CR2032 battery low signal
Add settings for 0xA0 status bits
Map numeric keypad to the virtual one on the keyboard for calculator
Base all timers on the main crystal
Mark as working with sound

Extensively tested on T400, testing on other systems was basic, but
covered the main use-cases and things that previously didn't work.

* Make the memory NVRAM

The machine uses battery-back SRAM, so contents are expected to
survive a restart.

* nakajies: power control cleanups and fixes

Add a Home-key "power button" that ties into the ROM wake/sleep
paths. When powered off (either via Home or the timeout), display
"POWERED OFF" and dim the screen.

Pressing Home again will power it on.

Clean up the 0x60 port hack so the IRQ F9 timer correctly counts
down the power timeout.

Add port 0x61 keyboard scan latch to prevent power off from capturing
mid-scan. Mame restarting the matrix mid-instruction would prevent
the keyboard from working.

Also, remove the default F8 binding to IRQ F8. This IRQ disables
input and enters a tight loop, eventively hanging the machine. It
can still be bound if someone actually wants to do that though,
just make sure the footgun is unloaded when handing it to the user.

* nakajies: fix resume keyboard first scan

There's a hitten F+J+Space chord that when held during power-on will
enter a monitor/diagnostic utility. Previously this was almost
impossible to hit on purpose.

* nakajies: support DreamWriter 200 floppy access

Map the DreamWriter 200 FDC ports explicitly instead of installing the
controller map wholesale. This lets the driver pass through the normal N82077
registers while overriding only the DOR, MSR and FIFO behavior that the ROM
observably depends on.

On reset release, the ROM immediately issues Sense Interrupt Status commands
and expects reset-complete results. Track those reset-sense requests in the
driver, report result-ready in MSR while the synthetic result is pending, and
use the core controller result when available before falling back to the reset
status values the ROM accepts.

Track command lengths for data-transfer commands so the wrapper can pulse TC
after the expected read, write or format payload has crossed the FIFO. The ROM
also rejects Sense Interrupt Status results with the head-select bit set, so
mask that ST0 bit on the first SIS result byte while leaving other controller
results untouched.

Configure the N82077AA in PS/2 mode to match the port layout used here. This
commit does not functionally depend on the preceding floppy image batching
change; however, formatting performs full-track writes through the generic
floppy image layer, so without that batching fix it still works but is
pathologically slow.

* nakajies: address DreamWriter review feedback

Remove the pointless fdc_dor_r trampoline
Suppress side effects in debugger for fdc_fifo_r()
Remove synthetic and inaccurate powered off screen

Author: RealDeuce