Users following verilator
Eido Tal
eidotal
Design Verification Architect & Technical Lead
SystemVerilog/UVM | SoC / Smart-NIC
Chirranjeavi Moorthi
CHIRRANJEAVI
Robotics, ML & VLSI engineer building future chips for autonomous cars & intelligent robots | Computer architecture & AI hardware
NYC, New York
Antonio Bernardini
AntonioBerna
Computer Engineering Student passionate about cybersecurity, hardware, firmware, and software, sharing knowledge through innovative projects and impactful code.
@intornoapp Rome
Supriya A. Mishra
29Sam
Second year EE student at IIT Bombay,
Interested in Problem Solving
EE B.tech, IIT Bombay Mumbai, India
Sanjay Karthikeyan
SanjayRich
Electronics Undergrad @ VIT Vellore | VLSI
Vit Vellore Chennai,Tamil Nadu
Vulupala tejashwi reddy
TejashwiVulupala
Embedded Systems & VLSI engineer | RTL & SystemVerilog | RISC-V SoC design on Zynq UltraScale+ | Passionate about verification, hardware/software co-design, and
Chaitanya bharathi institute of technology hyderabad
Timothy Lake
arachnewebb78-hash
I was born in 1978. I'm a musician and a writer. I am interested in Applied Mathematics and Computing.
Dayton, OH USA