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GTLin08henrikbrixandersen
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drivers/i2c: it8xxx2: Fix incorrect target address register
The base address was written to an incorrect register, which caused incorrect data to be read from the I2C target. This has been fixed by writing to the correct register. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
1 parent 7a3d2b6 commit bc20c41

2 files changed

Lines changed: 2 additions & 1 deletion

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drivers/i2c/i2c_ite_enhance.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1509,7 +1509,7 @@ static int i2c_enhance_target_register(const struct device *dev,
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* DMA read target address register
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* for high order byte
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*/
1512-
IT8XXX2_I2C_CMD_ADDH2(base) = out_data_addr >> 16;
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IT8XXX2_I2C_WM_ADDRH2(base) = out_data_addr >> 16;
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IT8XXX2_I2C_RAMHA2(base) = out_data_addr >> 8;
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IT8XXX2_I2C_RAMLA2(base) = out_data_addr;
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soc/ite/ec/it8xxx2/chip_chipregs.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1370,6 +1370,7 @@ enum chip_pll_mode {
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#define IT8XXX2_I2C_CMD_ADDL(base) ECREG(base + 0x26)
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#define IT8XXX2_I2C_RAMH2A(base) ECREG(base + 0x50)
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#define IT8XXX2_I2C_CMD_ADDH2(base) ECREG(base + 0x52)
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#define IT8XXX2_I2C_WM_ADDRH2(base) ECREG(base + 0x56)
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/* SMBus/I2C register fields */
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/* 0x09-0xB: SMCLK Timing Setting */

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