Merge pull request embassy-rs#718 from liebman/stm32wl-cleanup-lptim-sel-value-enums

stm32wl: cleanup/consolidate LPTIMSEL enum values

Author: Dirbaio

data/registers/rcc_wl5.yaml

@@ -1048,14 +1048,17 @@ fieldset/CCIPR:
     description: Low power timer 1 clock source selection
     bit_offset: 18
     bit_size: 2
+    enum: LPTIMSEL
   - name: LPTIM2SEL
     description: Low power timer 2 clock source selection
     bit_offset: 20
     bit_size: 2
+    enum: LPTIMSEL
   - name: LPTIM3SEL
     description: Low power timer 3 clock source selection
     bit_offset: 22
     bit_size: 2
+    enum: LPTIMSEL
   - name: ADCSEL
     description: ADC clock source selection
     bit_offset: 28
@@ -2024,6 +2027,21 @@ enum/RNGSEL:
     value: 2
   - name: MSI
     value: 3
+enum/LPTIMSEL:
+  bit_size: 2
+  variants:
+  - name: PCLK1
+    description: APB clock selected
+    value: 0
+  - name: LSI
+    description: LSI clock selected
+    value: 1
+  - name: HSI
+    description: HSI16 clock selected
+    value: 2
+  - name: LSE
+    description: LSE clock selected
+    value: 3
 enum/RTCSEL:
   bit_size: 2
   variants:

data/registers/rcc_wle.yaml

@@ -685,17 +685,17 @@ fieldset/CCIPR:
     description: Low power timer 1 clock source selection
     bit_offset: 18
     bit_size: 2
-    enum: LPTIM1SEL
+    enum: LPTIMSEL
   - name: LPTIM2SEL
     description: Low power timer 2 clock source selection
     bit_offset: 20
     bit_size: 2
-    enum: LPTIM2SEL
+    enum: LPTIMSEL
   - name: LPTIM3SEL
     description: Low power timer 3 clock source selection
     bit_offset: 22
     bit_size: 2
-    enum: LPTIM3SEL
+    enum: LPTIMSEL
   - name: ADCSEL
     description: ADC clock source selection
     bit_offset: 28
@@ -1662,37 +1662,7 @@ enum/RNGSEL:
   - name: MSI
     description: MSI clock selected
     value: 3
-enum/LPTIM3SEL:
-  bit_size: 2
-  variants:
-  - name: PCLK1
-    description: APB clock selected
-    value: 0
-  - name: LSI
-    description: LSI clock selected
-    value: 1
-  - name: HSI
-    description: HSI16 clock selected
-    value: 2
-  - name: LSE
-    description: LSE clock selected
-    value: 3
-enum/LPTIM2SEL:
-  bit_size: 2
-  variants:
-  - name: PCLK1
-    description: APB clock selected
-    value: 0
-  - name: LSI
-    description: LSI clock selected
-    value: 1
-  - name: HSI
-    description: HSI16 clock selected
-    value: 2
-  - name: LSE
-    description: LSE clock selected
-    value: 3
-enum/LPTIM1SEL:
+enum/LPTIMSEL:
   bit_size: 2
   variants:
   - name: PCLK1