@@ -88,21 +88,23 @@ class GPUResetAggregator(params: GPUResetParams, slaves: Seq[SoftResetFinishNode
8888 true .B
8989 }
9090
91- val coreFinishes = VecInit (bundles.map(_.finished))
92- val allFinished = coreFinishes.reduceTree(_ && _)
93- regNode.regmap(
94- Seq (
95- 0x00 -> Seq (RegField .w(32 , softReset(_, _))),
96- 0x08 -> Seq (RegField .r(32 , allFinished))
97- ) ++
98- coreFinishes.zipWithIndex.map { case (finish, gcid) =>
99- 0x10 + gcid * 0x04 -> Seq (RegField .r(32 , finish))
91+ if (slaves.nonEmpty) {
92+ val coreFinishes = VecInit (bundles.map(_.finished))
93+ val allFinished = coreFinishes.reduceTree(_ && _)
94+ regNode.regmap(
95+ Seq (
96+ 0x00 -> Seq (RegField .w(32 , softReset(_, _))),
97+ 0x08 -> Seq (RegField .r(32 , allFinished))
98+ ) ++
99+ coreFinishes.zipWithIndex.map { case (finish, gcid) =>
100+ 0x10 + gcid * 0x04 -> Seq (RegField .r(32 , finish))
101+ }
102+ : _* )
103+
104+ val (_, stopSim) = Counter (0 until 1024 , allFinished, ! allFinished)
105+ when (stopSim) {
106+ stop(" no more active warps for 1k cycles\n " )
100107 }
101- : _* )
102-
103- val (_, stopSim) = Counter (0 until 1024 , allFinished, ! allFinished)
104- when (stopSim) {
105- stop(" no more active warps for 1k cycles\n " )
106108 }
107109
108110 }
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