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some changes for gemmini and pd run
1 parent 5bb0c4a commit eca0ee7

2 files changed

Lines changed: 4 additions & 4 deletions

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src/main/scala/radiance/cluster/GemminiTile.scala

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,7 @@ class GemminiTile private (
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val gemminiSpadSizeBytes = gemminiParams.gemminiConfig.sp_capacity
192192
.asInstanceOf[CapacityInKilobytes].kilobytes * 1024
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require(isPow2(gemminiSpadSizeBytes))
194-
val reqSize = q.numInputLanes * q.inputBits / 8
194+
val reqSize = q.numGPUInputLanes * q.inputBits / 8
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println("quant manager address set")
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println(AddressSet(q.baseAddr, gemminiSpadSizeBytes * q.gpuMaxFactor - 1))
@@ -277,7 +277,7 @@ class GemminiTileModuleImp(outer: GemminiTile) extends BaseTileModuleImp(outer)
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// requantizer
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outer.gemminiParams.requantizer.foreach { q =>
280-
val in = Wire(Decoupled(new RequantizerInBundle(q.numInputLanes, q.inputBits)))
280+
val in = Wire(Decoupled(new RequantizerInBundle(q.numGPUInputLanes, q.inputBits)))
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val out = Wire(Decoupled(new RequantizerOutBundle(q.numOutputLanes, q.maxOutputBits)))
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283283
{ // input
@@ -341,7 +341,7 @@ class GemminiTileModuleImp(outer: GemminiTile) extends BaseTileModuleImp(outer)
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// lut
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val lutIO = outer.gemminiParams.lookupTable.map { c =>
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val lut = Wire(Decoupled(UInt(c.numBits.W)))
344-
outer.gemmini.module.mx_io.get.lut <> lut
344+
outer.gemmini.module.mx_io.get.lut <> lut.asTypeOf(outer.gemmini.module.mx_io.get.lut.cloneType)
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lut
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}
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src/main/scala/radiance/muon/MuonCore.scala

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ case class MuonCoreParams(
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// if true, use a bank-conflict-avoiding operand collector
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// if false, use a simple rs1/2/3-duplicated register file
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useCollector: Boolean = false,
39-
numRegBanks: Int = 4, // when useCollector true
39+
numRegBanks: Int = 1, // when useCollector true
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numCollectorEntries: Int = 1, // when useCollector true
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// execute
4242
intPipe: IntPipeParams = IntPipeParams(16, 16),

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