chore: use Undef to randomize input to cacheInfo

X-Actions-Control: difftest

Author: CSharperMantle

rtl/src/backend/execute/fu/LsuBlock.scala

@@ -529,14 +529,9 @@ class LsuBlock(val parameter: LsuBlockParameter)
   val dataRWStage    = Module(new UDCacheModule(parameter))
 
   // dataRWStage.io.dataAddrPack <> io.dataAddrPack
-  addrTransStage.io.in       <> io.in
-  addrTransStage.io.redirect <> io.redirect
-  io.bypass                  := dataRWStage.io.bypass
-  if (parameter.hasCache) {
-    io.cacheInfo := dataRWStage.io.cacheInfo
-  } else {
-    io.cacheInfo := 0.U.asTypeOf(io.cacheInfo)
-  }
+  addrTransStage.io.in           <> io.in
+  addrTransStage.io.redirect     <> io.redirect
+  io.bypass                      := dataRWStage.io.bypass
   io.out                         <> dataRWStage.io.out
   io.storeOut                    := dataRWStage.io.storeOut
   dataRWStage.io.redirect        := io.redirect
@@ -555,10 +550,16 @@ class LsuBlock(val parameter: LsuBlockParameter)
   dataRWStage.io.storeIn         <> addrTransStage.io.storeOut
   dataRWStage.io.noLoad          <> addrTransStage.io.noLoad
   io.icacopOut                   := dataRWStage.io.icacopOut
-  for (i <- 0 until 3 * parameter.portCount) {
-    io.cacheInfo(i) := dataRWStage.io.cacheInfo(i)
-  }
-  for (i <- 0 until parameter.portCount) {
-    io.cacheInfo(i + 3 * parameter.portCount) := addrTransStage.io.cacheInfo(i)
+  if (parameter.hasCache) {
+    for (i <- 0 until 3 * parameter.portCount) {
+      io.cacheInfo(i) := dataRWStage.io.cacheInfo(i)
+    }
+    for (i <- 0 until parameter.portCount) {
+      io.cacheInfo(i + 3 * parameter.portCount) := addrTransStage.io.cacheInfo(i)
+    }
+  } else {
+    for (ch <- io.cacheInfo) {
+      ch := Undef.asValid(chiselTypeOf(ch))
+    }
   }
 }