fix(lsu): wrong ResultMask merge logic

X-Actions-Control: difftest

Signed-off-by: Woshiluo Luo <woshiluo.luo@outlook.com>

Author: woshiluo

rtl/src/backend/execute/fu/lsu/dcache/utils.scala

@@ -196,7 +196,7 @@ class ResultMaskItem(val parameter: LsuBlockParameter) extends Bundle { self =>
     val result = Wire(chiselTypeOf(self))
     result.mask := VecInit(self.mask.zip(rhs.mask).map { case (a, b) => a | b })
     result.data := VecInit(for (i <- 0 until parameter.bankWidthInByte) yield {
-      Mux(self.mask(i), self.data(i), rhs.data(i))
+      Mux(rhs.mask(i), rhs.data(i), self.data(i))
     })
     result
   }