feat: add more hir gen paths, added lir infra, added max munch infra

Author: w4z3d

include/cinder/alloc/arena.hpp

@@ -1,6 +1,5 @@
 #pragma once
 
-#include <algorithm>
 #include <bit>
 #include <cassert>
 #include <cstddef>

include/cinder/ast/ast_dumper.hpp

@@ -367,7 +367,7 @@ class ASTDumper : public ASTVisitor {
 
   void visit(SubscriptExpr& expr) override {
     print_indent();
-    print_stmt_kind("ArraySubscriptExpr");
+    print_stmt_kind("SubscriptExpr");
     print_addr(&expr);
     print_loc(expr.span());
     out_ << "\n";

include/cinder/hir/builder.hpp

@@ -45,6 +45,9 @@ class Builder {
   // Casts
 
   // Memory
+  Instruction* create_load(type::QualType load_type, Value* address);
+  void create_store(Value* address, type::QualType store_type);
+  Instruction* create_gep(type::QualType type, Value* ptr, const std::vector<Value*>& offsets);
   Instruction* create_alloca(type::QualType allocated_type,
                              std::string_view name);  // Subject to Change I guess
 

include/cinder/hir/function.hpp

@@ -14,21 +14,23 @@ class Argument;
 
 class Function final : public Value {
  public:
-  explicit Function(std::string_view name, type::QualType type, Module* parent)
-      : Value(ValueKind::Function, type), name_(name), parent_(parent) {}
+  explicit Function(std::string_view name, type::QualType type, Module* parent, Linkage linkage)
+      : Value(ValueKind::Function, type), name_(name), parent_(parent), linkage_(linkage) {}
 
   void add_block(BasicBlock* basic_block) { blocks_.push_back(basic_block); }
   void add_argument(Argument* basic_block) { arguments_.push_back(basic_block); }
 
   std::string_view name() const { return name_; }
   const std::vector<BasicBlock*>& blocks() const { return blocks_; }
   Module* parent() const { return parent_; }
+  Linkage linkage() const { return linkage_; }
 
  private:
   std::string_view name_;
   std::vector<BasicBlock*> blocks_;
   std::vector<Argument*> arguments_;
   Module* parent_;
+  Linkage linkage_;
 };
 
 class Argument : public Value {

include/cinder/hir/hir.hpp

@@ -6,3 +6,5 @@
 #include "cinder/hir/module.hpp"
 #include "cinder/hir/opcode.hpp"
 #include "cinder/hir/value.hpp"
+
+namespace cinder::hir {}  // namespace cinder::hir

include/cinder/hir/instruction.hpp

@@ -6,7 +6,7 @@ namespace cinder::hir {
 
 class BasicBlock;
 
-class Instruction final : public Value, public arena::ListHook<Instruction> {
+class Instruction : public Value, public arena::ListHook<Instruction> {
  public:
   explicit Instruction(Opcode opcode, type::QualType type, BasicBlock* parent,
                        std::vector<Value*> operands)
@@ -43,4 +43,5 @@ class PoisonValue final : public Value {
  public:
   PoisonValue(type::QualType type) : Value(ValueKind::Poison, type) {}
 };
+
 }  // namespace cinder::hir

include/cinder/hir/value.hpp

@@ -9,6 +9,7 @@ class Use {
  public:
 };
 
+enum class Linkage : uint8_t { Internal, External };
 enum class ValueKind {
   Function,
   BasicBlock,

include/cinder/hirgen/hirgen.hpp

@@ -29,6 +29,7 @@ class HIRGen {
   hir::Value* emit_integer_literal(ast::IntegerLiteralExpr* expr);
   hir::Value* emit_binary_expr(ast::BinaryExpr* expr);
   hir::Value* emit_decl_ref_expr(ast::DeclRefExpr* expr);
+  hir::Value* emit_subscript_expr(ast::SubscriptExpr* expr);
   hir::Value* emit_call_expr(ast::CallExpr* expr);
   hir::Value* emit_rvalue(ast::Expr* expr);
   hir::Value* emit_lvalue(ast::Expr* expr);

include/cinder/isel/isel.hpp

@@ -0,0 +1,41 @@
+#pragma once
+#include <unordered_map>
+
+#include "cinder/alloc/arena.hpp"
+#include "cinder/hir/hir.hpp"
+#include "cinder/lir/aarch64/aarch64.hpp"
+#include "cinder/lir/lir.hpp"
+
+namespace cinder::isel {
+
+class Isel {
+ public:
+  explicit Isel(arena::Arena& arena) : arena_(arena) {}
+  lir::aarch64::Function* run(hir::Function* function);
+
+ private:
+  using Register = lir::aarch64::Register;
+  using Opcode = lir::aarch64::Opcode;
+
+  void compute_use_counts(hir::Function* function);
+  bool foldable(hir::Value* value) const;
+  const hir::ConstantInt* foldable_const(hir::Value* operand) const;
+
+  Register munch(hir::Value* value);
+  Register munch_binary(hir::Instruction* inst);
+  Register munch_const(const hir::ConstantInt* constant);
+  Register munch_srem(hir::Instruction* inst);
+  void munch_ret(hir::Instruction* inst);
+
+  Register fresh_vreg() { return Register::vreg(next_vreg_++, Register::RegClass::GPR64); }
+  Register emit_rr(Opcode op, Register lhs, Register rhs);
+  Register emit_ri(Opcode op, Register lhs, std::uint64_t imm);
+
+  arena::Arena& arena_;
+  lir::aarch64::BasicBlock* insert_point_ = nullptr;
+  std::uint32_t next_vreg_ = 0;
+
+  std::unordered_map<const hir::Value*, int> use_counts_;
+  std::unordered_map<const hir::Value*, Register> emitted_;
+};
+}  // namespace cinder::isel

include/cinder/lir/aarch64/aarch64.hpp

@@ -0,0 +1,178 @@
+#pragma once
+#include <cstdint>
+#include <vector>
+
+#include "cinder/alloc/arena_list.hpp"
+
+namespace cinder::lir::aarch64 {
+
+enum class Opcode : uint8_t {
+  COPY,
+  PHI,
+
+  ADDXrr,
+  ADDXri,
+
+  SUBXrr,
+  SUBXri,
+  MSUBrrr,
+
+  MULXrr,
+  SDIVrr,
+
+  ANDXrr,
+  ORRXrr,
+  EORXrr,
+
+  LSLXri,
+  LSRXri,
+  ASRXri,
+
+  MOVZ,
+  MOVK,
+
+  LDRXui,
+  STRXui,
+
+  CMPXrr,
+  CMPXri,
+
+  B,
+  B_EQ,
+  B_NE,
+  B_LT,
+  B_LE,
+  B_GE,
+
+  BL,
+  RET,
+};
+class Register final {
+ public:
+  enum class Kind : uint8_t { Virtual, Phyiscal };
+  enum class RegClass : uint8_t {
+    GPR32,
+    GPR64,
+    FPR32,
+    FPR64,
+
+    VECTOR_128
+  };
+
+  explicit constexpr Register(Kind kind, uint32_t id, RegClass reg_class)
+      : id_(id), kind_(kind), reg_class_(reg_class) {}
+
+  static constexpr Register vreg(uint32_t id, RegClass reg_class) {
+    return Register(Kind::Virtual, id, reg_class);
+  }
+
+  static constexpr Register preg(uint32_t id, RegClass reg_class) {
+    return Register(Kind::Phyiscal, id, reg_class);
+  }
+
+  [[nodiscard]] uint32_t id() const { return id_; }
+  [[nodiscard]] RegClass reg_class() const { return reg_class_; }
+  [[nodiscard]] Kind kind() const { return kind_; }
+
+ private:
+  uint32_t id_;
+  Kind kind_;
+  RegClass reg_class_;
+};
+
+class StackSlot final {};
+
+class Operand {
+ public:
+  enum class Kind { Register, Immediate, StackSlot };
+  static constexpr Operand reg(Register r) { return Operand(r); }
+  static constexpr Operand imm(std::uint64_t value) { return Operand(value); }
+  static constexpr Operand slot(StackSlot s) { return Operand(s); }
+
+  [[nodiscard]] Kind kind() const { return kind_; }
+
+  [[nodiscard]] bool is_register() const { return kind_ == Kind::Register; }
+  [[nodiscard]] bool is_immediate() const { return kind_ == Kind::Register; }
+  [[nodiscard]] bool is_stack_slot() const { return kind_ == Kind::Register; }
+
+  [[nodiscard]] Register reg() const {
+    assert(kind_ == Kind::Register && "Called reg() on non register operand");
+    return reg_;
+  }
+  [[nodiscard]] uint64_t imm() const {
+    assert(kind_ == Kind::Immediate && "Called imm() on non immediate operand");
+    return imm_;
+  }
+  [[nodiscard]] StackSlot stack_slot() const {
+    assert(kind_ == Kind::StackSlot && "Called stack_slot() on non stack_slot operand");
+    return stack_slot_;
+  }
+
+ private:
+  explicit constexpr Operand(Register reg) : kind_(Kind::Register), reg_(reg) {}
+  explicit constexpr Operand(uint64_t imm) : kind_(Kind::Immediate), imm_(imm) {}
+  explicit constexpr Operand(StackSlot slot) : kind_(Kind::StackSlot), stack_slot_(slot) {}
+
+  Kind kind_;
+  union {
+    Register reg_;
+    uint64_t imm_;
+    StackSlot stack_slot_;
+  };
+};
+
+class Instruction final : public arena::ListHook<Instruction> {
+ public:
+  explicit Instruction(Opcode opcode, std::vector<Operand> uses, std::vector<Register> defs,
+                       std::vector<Register> implicit_uses = {},
+                       std::vector<Register> implicit_defs = {})
+      : opcode_(opcode),
+        defs_(std::move(defs)),
+        uses_(std::move(uses)),
+        implicit_defs_(std::move(implicit_defs)),
+        implicit_uses_(std::move(implicit_uses)) {}
+
+  [[nodiscard]] Opcode opcode() const { return opcode_; }
+
+  [[nodiscard]] const std::vector<Operand>& uses() const { return uses_; }
+  [[nodiscard]] std::vector<Operand>& uses_mut() { return uses_; }
+
+  [[nodiscard]] Operand operand(unsigned n) const { return uses_[n]; }
+
+  [[nodiscard]] const std::vector<Register>& defs() const { return defs_; }
+  [[nodiscard]] std::vector<Register>& defs_mut() { return defs_; }
+
+  [[nodiscard]] const std::vector<Register>& implicit_uses() const { return implicit_uses_; }
+  [[nodiscard]] const std::vector<Register>& implicit_defs() const { return implicit_defs_; }
+
+ private:
+  Opcode opcode_;
+  std::vector<Register> defs_;
+  std::vector<Operand> uses_;
+  std::vector<Register> implicit_defs_;
+  std::vector<Register> implicit_uses_;
+};
+
+class BasicBlock final : public arena::ListHook<BasicBlock> {
+ public:
+  void add_instruction(Instruction* instruction) { instructions_.push_back(instruction); }
+
+  arena::ArenaList<Instruction>& instructions_mut() { return instructions_; }
+  const arena::ArenaList<Instruction>& instructions() const { return instructions_; }
+
+ private:
+  arena::ArenaList<Instruction> instructions_;
+};
+
+class Function final : public arena::ListHook<Function> {
+ public:
+ private:
+  arena::ArenaList<BasicBlock> blocks_;
+};
+
+class Module final {
+ public:
+ private:
+  arena::ArenaList<Function> functions_;
+};
+}  // namespace cinder::lir::aarch64