feat: better isel and subscript selection

Author: w4z3d

include/cinder/hir/builder.hpp

@@ -12,6 +12,7 @@ class Builder {
   [[nodiscard]] const BasicBlock* insert_point() const { return insert_point_; }
 
   ConstantInt* const_i32(int32_t value);
+  ConstantInt* const_i64(int64_t value);
   Function* create_function(Module* parent, std::string_view name, type::QualType function_type);
   Argument* create_argument(std::string_view name, Function* parent, type::QualType type,
                             uint8_t index);
@@ -43,6 +44,7 @@ class Builder {
   // Comparisons
 
   // Casts
+  Value* create_sext(type::QualType type, Value* val);
 
   // Memory
   Instruction* create_load(type::QualType load_type, Value* address);

include/cinder/isel/isel.hpp

@@ -7,6 +7,10 @@
 #include "cinder/lir/aarch64/aarch64_builder.hpp"
 
 namespace cinder::isel {
+struct MemAddr {
+  lir::aarch64::Register base;
+  std::uint64_t imm;
+};
 
 /// Greedy maximal-munch instruction selection, HIR -> AArch64 LIR.
 ///
@@ -38,7 +42,14 @@ class Isel {
   Register munch_const(const hir::ConstantInt* constant);
   Register munch_srem(hir::Instruction* inst);
   Register munch_call(hir::Instruction* inst);
-
+  Register munch_load(hir::Instruction* inst);
+  Register munch_gep(hir::Instruction* inst);
+  Register munch_sext(hir::Instruction* inst);
+  void munch_store(hir::Instruction* inst);
+  Register materialize_const(std::uint64_t value);
+  MemAddr match_address(hir::Value* val, unsigned access_byte);
+  const hir::ConstantInt* index_const(hir::Value* val) const;
+  static std::uint64_t gep_element_size(hir::Instruction* gep);
   void munch_ret(hir::Instruction* inst);
 
   lir::aarch64::Aarch64Builder builder_;

include/cinder/lir/aarch64/aarch64.hpp

@@ -15,6 +15,7 @@ enum class Opcode : uint8_t {
   PHI,
 
   ADDXrr,
+  ADDXrs,
   ADDWrr,
   ADDXri,
   ADDWri,
@@ -53,6 +54,14 @@ enum class Opcode : uint8_t {
   STRXui,
   STRWui,
 
+  SXTBr,
+  SXTHr,
+  SXTWr,
+
+  LDRBui,
+  LDRHui,
+  STRBui,
+  STRHui,
   CMPXrr,
   CMPWrr,
   CMPXri,

include/cinder/lir/aarch64/aarch64_builder.hpp

@@ -67,8 +67,12 @@ class Aarch64Builder {
   void create_ret(Register implicit_value);
 
   Register emit_rr(Opcode opcode, Register lhs, Register rhs);
+  Register emit_r(Opcode opcode, Register lhs);
   Register emit_rrr(Opcode opcode, Register a, Register b, Register c);
   Register emit_ri(Opcode opcode, Register lhs, std::uint64_t imm);
+  Register emit_load(Opcode op, Register base, std::uint64_t imm);
+  void emit_store(Opcode op, Register src, Register base, std::uint64_t imm);
+  Register emit_rr_shift(Opcode op, Register rn, Register rm, unsigned shift);
 
  private:
   Instruction* insert(Instruction* instruction);

include/cinder/lir/aarch64/target_spec.hpp

@@ -1,6 +1,7 @@
 #pragma once
 
 #include <array>
+#include <cstdint>
 
 #include "cinder/lir/aarch64/aarch64.hpp"
 namespace cinder::lir::aarch64 {
@@ -72,7 +73,7 @@ static constexpr Register w30 = Register::preg(30, Register::RegClass::GPR32);
 static constexpr Register fp = x29;
 static constexpr Register lr = x30;
 
-static constexpr std::array<Register, 8> arg_registers{x0, x1, x2, x3, x4, x5, x6, x7};
+static constexpr std::array<uint8_t, 8> arg_registers{0, 1, 2, 3, 4, 5, 6, 7};
 
 static constexpr std::array<Register, 19> caller_saved{
     x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18};

src/driver/driver.cpp

@@ -70,7 +70,7 @@ bool CompilationUnit::compile() {
   lir::aarch64::Module* lir_module = isel.run(module);
   // std::cout << lir_printer.print_module(*lir_module);
   regalloc::allocate_registers(*lir_module, arena);
-  std::cout << lir_printer.print_module(*lir_module);
+  // std::cout << lir_printer.print_module(*lir_module);
   lir::aarch64::AsmEmitter emitter{};
   std::string asm_string = emitter.emit_module(*lir_module);
   std::ofstream out_file("out.s");

src/hir/builder.cpp

@@ -13,6 +13,11 @@ ConstantInt* Builder::const_i32(std::int32_t value) {
                                     static_cast<std::uint64_t>(value));
 }
 
+ConstantInt* Builder::const_i64(std::int64_t value) {
+  return arena_.create<ConstantInt>(type::QualType{types_.get_int()},
+                                    static_cast<std::uint64_t>(value));
+}
+
 Function* Builder::create_function(Module* parent, std::string_view name,
                                    type::QualType function_type) {
   auto* function = arena_.create<Function>(name, function_type, parent, Linkage::Internal);
@@ -99,6 +104,17 @@ Instruction* Builder::create_ashr(Value* lhs, Value* rhs) {
   return create_binary(Opcode::AShr, lhs, rhs);
 }
 
+Value* Builder::create_sext(type::QualType type, Value* val) {
+  if (val->kind() == hir::ValueKind::ConstantInt) {
+    const auto* c = static_cast<const hir::ConstantInt*>(val);
+    // value() is already int64_t; sign extension of a signed value to a wider
+    // signed type is the identity on the stored representation.
+    return const_i64(c->value());
+  }
+  auto* inst =
+      arena_.create<Instruction>(Opcode::SExt, type, insert_point_, std::vector<Value*>{val});
+  return insert(inst);
+}
 Instruction* Builder::create_gep(type::QualType type, Value* ptr,
                                  const std::vector<Value*>& offsets) {
   std::vector<Value*> operands(offsets);

src/hirgen/hirgen.cpp

@@ -173,7 +173,9 @@ hir::Value* HIRGen::emit_lvalue(ast::Expr* expr) {
         base = emit_rvalue(sub->base());  // load the pointer value
       }
       hir::Value* index = emit_rvalue(sub->index());
-      return builder_.create_gep(expr->type().value(), base, {index});  // pointer-to-element
+      hir::Value* sign_extended = builder_.create_sext(expr->type().value(), index);
+      return builder_.create_gep(expr->type().value(), base,
+                                 {sign_extended});  // pointer-to-element
     }
     default:
       break;