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Waveshare_Team
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drm/panel: waveshare: Add Waveshare 6.25-DSI-TOUCH-A panel support
Add initialization sequences and display modes for the Waveshare 6.25-DSI-TOUCH-A display in both 2-lane and 4-lane MIPI DSI configurations. The panel uses a 720x1560 resolution at 93MHz pixel clock with MIPI DSI RGB888 format. Signed-off-by: Waveshare_Team <support@waveshare.com>
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‎drivers/gpu/drm/panel/panel-waveshare-dsi-v2.c‎

Lines changed: 182 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1393,6 +1393,139 @@ static const struct panel_init_cmd ws_panel_7_c_init[] = {
13931393
{},
13941394
};
13951395

1396+
static const struct panel_init_cmd ws_panel_6_25_a_4lane_init[] = {
1397+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0xa2),
1398+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0xa3),
1399+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0xa4),
1400+
_INIT_DCS_CMD(0xB0, 0x22, 0x61, 0x11, 0x6B, 0x25, 0x39, 0x39),
1401+
_INIT_DCS_CMD(0xB7, 0x00, 0x00, 0x64, 0x64),
1402+
_INIT_DCS_CMD(0xBF, 0x95, 0x95),
1403+
_INIT_DCS_CMD(0xC8, 0x00, 0x00, 0x10, 0x1F, 0x3A, 0x00, 0x66, 0x03,
1404+
0xA8, 0x04, 0x11, 0x02, 0x06, 0x73, 0x01, 0x21, 0xC1,
1405+
0x02, 0x01, 0x02, 0x22, 0x3E, 0x00, 0x84, 0x09, 0x32,
1406+
0xE9, 0x0B, 0x3B, 0x0D, 0xF3, 0x7E, 0x0D, 0xB2, 0xE6,
1407+
0x03, 0xFC),
1408+
_INIT_DCS_CMD(0xC9, 0x00, 0x00, 0x10, 0x1F, 0x3A, 0x00, 0x66, 0x03,
1409+
0xA8, 0x04, 0x11, 0x02, 0x06, 0x73, 0x01, 0x21, 0xC1,
1410+
0x02, 0x01, 0x02, 0x22, 0x3E, 0x00, 0x84, 0x09, 0x32,
1411+
0xE9, 0x0B, 0x3B, 0x0D, 0xF3, 0x7E, 0x0D, 0xB2, 0xE6,
1412+
0x03, 0xFC),
1413+
_INIT_DCS_CMD(0xD7, 0x10, 0x12, 0x49, 0x3B, 0x0C, 0x0C),
1414+
_INIT_DCS_CMD(0x90, 0x71, 0x23, 0x5A, 0x20, 0x24, 0x09, 0x09),
1415+
_INIT_DCS_CMD(0xA3, 0x80, 0x01, 0x88, 0x30, 0x05, 0x00, 0x00, 0x00,
1416+
0x00, 0x00, 0x46, 0x00, 0x00, 0x1E, 0x5C, 0x1E, 0x80,
1417+
0x00, 0x4F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46,
1418+
0x00, 0x00, 0x1E, 0x5C, 0x1E, 0x80, 0x00, 0x6F, 0x58,
1419+
0x00, 0x00, 0x00, 0xFF),
1420+
_INIT_DCS_CMD(0xA6, 0x50, 0x00, 0x24, 0x55, 0x3A, 0x00, 0x00, 0x01,
1421+
0x54, 0x54, 0x91, 0xFF, 0x00, 0x24, 0x55, 0x3B, 0x00,
1422+
0x00, 0x00, 0x54, 0x54, 0x91, 0xFF, 0x00, 0x24, 0x11,
1423+
0x00, 0x00, 0x00, 0x00, 0x54, 0x54, 0x91, 0xFF, 0x00,
1424+
0xAC, 0x11, 0x00, 0x00, 0x00, 0x00, 0x54, 0x54, 0xFF,
1425+
0xFF, 0x00, 0x08, 0x80, 0x08, 0x80, 0x06, 0x00, 0x00,
1426+
0x00, 0x00),
1427+
_INIT_DCS_CMD(0xA7, 0x1D, 0x1D, 0x80, 0x64, 0x40, 0x07, 0x16, 0x41,
1428+
0x02, 0x48, 0x07, 0x54, 0x54, 0x91, 0xFF, 0x08, 0x80,
1429+
0x64, 0x40, 0x25, 0x34, 0x43, 0x04, 0x06, 0x05, 0x54,
1430+
0x54, 0x91, 0xFF, 0x08, 0x80, 0x64, 0x40, 0x00, 0x00,
1431+
0x40, 0x00, 0x00, 0x00, 0x54, 0x54, 0x91, 0xFF, 0x08,
1432+
0x80, 0x64, 0x40, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00,
1433+
0x54, 0x54, 0x84, 0xFF, 0x08, 0x80, 0x44),
1434+
_INIT_DCS_CMD(0xAC, 0x1C, 0x02, 0x09, 0x0B, 0x12, 0x10, 0x18, 0x19,
1435+
0x1C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1436+
0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x00, 0x08, 0x0A,
1437+
0x13, 0x11, 0x18, 0x19, 0x1C, 0x03, 0x00, 0x00, 0x00,
1438+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
1439+
_INIT_DCS_CMD(0xAD, 0xF0, 0x00, 0x46, 0x00, 0x05, 0x50, 0x50, 0xFF,
1440+
0xFF, 0xF0, 0x40, 0x06, 0x01, 0x07, 0x42, 0x42, 0xFF,
1441+
0xFF, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF),
1442+
_INIT_DCS_CMD(0xAE, 0xFF, 0x03, 0x00, 0xFF, 0x03, 0x00, 0x01),
1443+
_INIT_DCS_CMD(0xB2, 0x15, 0x19, 0x05, 0x23, 0x49, 0xAF, 0x03, 0x2E,
1444+
0x5C, 0xD2, 0xFF, 0x10, 0x20, 0xFD, 0x20, 0xC0, 0x00),
1445+
_INIT_DCS_CMD(0xE8, 0x20, 0x6F, 0x04, 0x7C, 0x7C, 0x3E, 0x04, 0xDC,
1446+
0xDC, 0x3E, 0x06, 0xFA, 0x26, 0x3E),
1447+
_INIT_DCS_CMD(0x75, 0x03, 0x04),
1448+
_INIT_DCS_CMD(0xE7, 0x3B, 0x00, 0x00, 0x7C, 0xA1, 0x8C, 0x20, 0x1A,
1449+
0xF0, 0xB1, 0x50, 0x00, 0x50, 0xB1, 0x50, 0xB1, 0x50,
1450+
0xD8, 0x00, 0x55, 0x00, 0xB1, 0x00, 0x45, 0xC9, 0x6A,
1451+
0xFF, 0x5A, 0xD8, 0x18, 0x88, 0x15, 0xB1, 0x01, 0x01,
1452+
0x77),
1453+
_INIT_DCS_CMD(0xEA, 0x13, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x2C),
1454+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0x00),
1455+
_INIT_DCS_CMD(0x11),
1456+
_INIT_DELAY_CMD(120),
1457+
_INIT_DCS_CMD(0x29),
1458+
_INIT_DELAY_CMD(50),
1459+
{},
1460+
};
1461+
1462+
static const struct panel_init_cmd ws_panel_6_25_a_init[] = {
1463+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0xa2),
1464+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0xa3),
1465+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0xa4),
1466+
_INIT_DCS_CMD(0xB0, 0x22, 0x61, 0x11, 0x6B, 0x25, 0x39, 0x39),
1467+
_INIT_DCS_CMD(0xB7, 0x00, 0x00, 0x64, 0x64),
1468+
_INIT_DCS_CMD(0xBF, 0x95, 0x95),
1469+
_INIT_DCS_CMD(0xA4, 0x31),
1470+
_INIT_DCS_CMD(0xC8, 0x00, 0x00, 0x10, 0x1F, 0x3A, 0x00, 0x66, 0x03,
1471+
0xA8, 0x04, 0x11, 0x02, 0x06, 0x73, 0x01, 0x21, 0xC1,
1472+
0x02, 0x01, 0x02, 0x22, 0x3E, 0x00, 0x84, 0x09, 0x32,
1473+
0xE9, 0x0B, 0x3B, 0x0D, 0xF3, 0x7E, 0x0D, 0xB2, 0xE6,
1474+
0x03, 0xFC),
1475+
_INIT_DCS_CMD(0xC9, 0x00, 0x00, 0x10, 0x1F, 0x3A, 0x00, 0x66, 0x03,
1476+
0xA8, 0x04, 0x11, 0x02, 0x06, 0x73, 0x01, 0x21, 0xC1,
1477+
0x02, 0x01, 0x02, 0x22, 0x3E, 0x00, 0x84, 0x09, 0x32,
1478+
0xE9, 0x0B, 0x3B, 0x0D, 0xF3, 0x7E, 0x0D, 0xB2, 0xE6,
1479+
0x03, 0xFC),
1480+
_INIT_DCS_CMD(0xD7, 0x10, 0x12, 0x49, 0x3B, 0x0C, 0x0C),
1481+
_INIT_DCS_CMD(0x90, 0x71, 0x23, 0x5A, 0x20, 0x24, 0x09, 0x09),
1482+
_INIT_DCS_CMD(0xA3, 0x80, 0x01, 0x88, 0x30, 0x05, 0x00, 0x00, 0x00,
1483+
0x00, 0x00, 0x46, 0x00, 0x00, 0x1E, 0x5C, 0x1E, 0x80,
1484+
0x00, 0x4F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46,
1485+
0x00, 0x00, 0x1E, 0x5C, 0x1E, 0x80, 0x00, 0x6F, 0x58,
1486+
0x00, 0x00, 0x00, 0xFF),
1487+
_INIT_DCS_CMD(0xA6, 0x50, 0x00, 0x24, 0x55, 0x3A, 0x00, 0x00, 0x01,
1488+
0x54, 0x54, 0x91, 0xFF, 0x00, 0x24, 0x55, 0x3B, 0x00,
1489+
0x00, 0x00, 0x54, 0x54, 0x91, 0xFF, 0x00, 0x24, 0x11,
1490+
0x00, 0x00, 0x00, 0x00, 0x54, 0x54, 0x91, 0xFF, 0x00,
1491+
0xAC, 0x11, 0x00, 0x00, 0x00, 0x00, 0x54, 0x54, 0xFF,
1492+
0xFF, 0x00, 0x08, 0x80, 0x08, 0x80, 0x06, 0x00, 0x00,
1493+
0x00, 0x00),
1494+
_INIT_DCS_CMD(0xA7, 0x1D, 0x1D, 0x80, 0x64, 0x40, 0x07, 0x16, 0x41,
1495+
0x02, 0x48, 0x07, 0x54, 0x54, 0x91, 0xFF, 0x08, 0x80,
1496+
0x64, 0x40, 0x25, 0x34, 0x43, 0x04, 0x06, 0x05, 0x54,
1497+
0x54, 0x91, 0xFF, 0x08, 0x80, 0x64, 0x40, 0x00, 0x00,
1498+
0x40, 0x00, 0x00, 0x00, 0x54, 0x54, 0x91, 0xFF, 0x08,
1499+
0x80, 0x64, 0x40, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00,
1500+
0x54, 0x54, 0x84, 0xFF, 0x08, 0x80, 0x44),
1501+
_INIT_DCS_CMD(0xAC, 0x1C, 0x02, 0x09, 0x0B, 0x12, 0x10, 0x18, 0x19,
1502+
0x1C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1503+
0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x00, 0x08, 0x0A,
1504+
0x13, 0x11, 0x18, 0x19, 0x1C, 0x03, 0x00, 0x00, 0x00,
1505+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
1506+
_INIT_DCS_CMD(0xAD, 0xF0, 0x00, 0x46, 0x00, 0x05, 0x50, 0x50, 0xFF,
1507+
0xFF, 0xF0, 0x40, 0x06, 0x01, 0x07, 0x42, 0x42, 0xFF,
1508+
0xFF, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF),
1509+
_INIT_DCS_CMD(0xAE, 0xFF, 0x03, 0x00, 0xFF, 0x03, 0x00, 0x01),
1510+
_INIT_DCS_CMD(0xB2, 0x15, 0x19, 0x05, 0x23, 0x49, 0xAF, 0x03, 0x2E,
1511+
0x5C, 0xD2, 0xFF, 0x10, 0x20, 0xFD, 0x20, 0xC0, 0x00),
1512+
_INIT_DCS_CMD(0xE8, 0x20, 0x6F, 0x04, 0x7C, 0x7C, 0x3E, 0x04, 0xDC,
1513+
0xDC, 0x3E, 0x06, 0xFA, 0x26, 0x3E),
1514+
_INIT_DCS_CMD(0x75, 0x03, 0x04),
1515+
_INIT_DCS_CMD(0xE7, 0x3B, 0x00, 0x00, 0x7C, 0xA1, 0x8C, 0x20, 0x1A,
1516+
0xF0, 0xB1, 0x50, 0x00, 0x50, 0xB1, 0x50, 0xB1, 0x50,
1517+
0xD8, 0x00, 0x55, 0x00, 0xB1, 0x00, 0x45, 0xC9, 0x6A,
1518+
0xFF, 0x5A, 0xD8, 0x18, 0x88, 0x15, 0xB1, 0x01, 0x01,
1519+
0x77),
1520+
_INIT_DCS_CMD(0xEA, 0x13, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x2C),
1521+
_INIT_DCS_CMD(0x60, 0x71, 0x23, 0x00),
1522+
_INIT_DCS_CMD(0x11),
1523+
_INIT_DELAY_CMD(120),
1524+
_INIT_DCS_CMD(0x29),
1525+
_INIT_DELAY_CMD(50),
1526+
{},
1527+
};
1528+
13961529
static const struct panel_init_cmd ws_panel_5_5_a_init[] = {
13971530
_INIT_DCS_CMD(0xB9, 0xFF, 0x83, 0x94),
13981531
_INIT_DCS_CMD(0xBA, 0x61, 0x03, 0x68, 0x6B, 0xB2, 0xC0),
@@ -1935,6 +2068,34 @@ static const struct drm_display_mode ws_panel_7_c_mode = {
19352068
.height_mm = 85,
19362069
};
19372070

2071+
static const struct drm_display_mode ws_panel_6_25_a_4lane_mode = {
2072+
.clock = 93000,
2073+
.hdisplay = 720,
2074+
.hsync_start = 720 + 40,
2075+
.hsync_end = 720 + 40 + 20,
2076+
.htotal = 720 + 40 + 20 + 40,
2077+
.vdisplay = 1560,
2078+
.vsync_start = 1560 + 320,
2079+
.vsync_end = 1560 + 320 + 2,
2080+
.vtotal = 1560 + 320 + 2 + 16,
2081+
.width_mm = 62,
2082+
.height_mm = 110,
2083+
};
2084+
2085+
static const struct drm_display_mode ws_panel_6_25_a_mode = {
2086+
.clock = 83000,
2087+
.hdisplay = 720,
2088+
.hsync_start = 720 + 20,
2089+
.hsync_end = 720 + 20 + 20,
2090+
.htotal = 720 + 20 + 20 + 20,
2091+
.vdisplay = 1560,
2092+
.vsync_start = 1560 + 200,
2093+
.vsync_end = 1560 + 200 + 8,
2094+
.vtotal = 1560 + 200 + 8 + 10,
2095+
.width_mm = 62,
2096+
.height_mm = 110,
2097+
};
2098+
19382099
static const struct drm_display_mode ws_panel_5_5_a_mode = {
19392100
.clock = 65000,
19402101
.hdisplay = 720,
@@ -2243,6 +2404,24 @@ static const struct ws_panel_desc ws_panel_7_inch_c_desc = {
22432404
.format = MIPI_DSI_FMT_RGB888,
22442405
};
22452406

2407+
static const struct ws_panel_desc ws_panel_6_25_inch_a_4lane_desc = {
2408+
.init = ws_panel_6_25_a_4lane_init,
2409+
.mode = &ws_panel_6_25_a_4lane_mode,
2410+
.mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
2411+
MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
2412+
.lanes = 4,
2413+
.format = MIPI_DSI_FMT_RGB888,
2414+
};
2415+
2416+
static const struct ws_panel_desc ws_panel_6_25_inch_a_desc = {
2417+
.init = ws_panel_6_25_a_init,
2418+
.mode = &ws_panel_6_25_a_mode,
2419+
.mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
2420+
MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
2421+
.lanes = 2,
2422+
.format = MIPI_DSI_FMT_RGB888,
2423+
};
2424+
22462425
static const struct ws_panel_desc ws_panel_5_5_inch_a_desc = {
22472426
.init = ws_panel_5_5_a_init,
22482427
.mode = &ws_panel_5_5_a_mode,
@@ -2301,6 +2480,9 @@ static const struct of_device_id ws_panel_of_match[] = {
23012480
{ .compatible = "waveshare,7.0-dsi-touch-a", &ws_panel_7_inch_a_desc },
23022481
{ .compatible = "waveshare,7.0-dsi-touch-b", &ws_panel_7_inch_a_desc },
23032482
{ .compatible = "waveshare,7.0-dsi-touch-c", &ws_panel_7_inch_c_desc },
2483+
{ .compatible = "waveshare,6.25-dsi-touch-a,4lane",
2484+
&ws_panel_6_25_inch_a_4lane_desc },
2485+
{ .compatible = "waveshare,6.25-dsi-touch-a", &ws_panel_6_25_inch_a_desc },
23042486
{ .compatible = "waveshare,5.5-dsi-touch-a",
23052487
&ws_panel_5_5_inch_a_desc },
23062488
{ .compatible = "waveshare,5.0-dsi-touch-a", &ws_panel_5_inch_a_desc },

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