Skip to content

Commit c9873c7

Browse files
committed
Use AVX2-style SIMDE path for RISC-V
1 parent 2c25d4e commit c9873c7

4 files changed

Lines changed: 9 additions & 5 deletions

File tree

CMakeLists.txt

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -172,10 +172,13 @@ elseif(_ABPOA_WASM)
172172
target_compile_options(abpoa PRIVATE -msimd128)
173173

174174
elseif(_ABPOA_RISCV)
175-
# RISC-V: use the existing SIMDE-backed portable SIMD path without
176-
# injecting host-specific march flags or x86 dispatch machinery.
175+
# RISC-V: like ARM, use the existing SIMDE-backed AVX2-flavored path
176+
# without injecting host-specific march flags or x86 dispatch machinery.
177+
# Leaving __AVX2__ undefined falls back to the 128-bit SSE2-style path,
178+
# which is not the project's validated portable configuration.
177179
message(STATUS "RISC-V target detected; building abPOA with the portable SIMDE path")
178180
target_sources(abpoa PRIVATE src/abpoa_align_simd.c)
181+
target_compile_definitions(abpoa PRIVATE __AVX2__)
179182

180183
else()
181184
# Fallback: single compile with -march=native

Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ endif
7373
endif
7474

7575
ifneq ($(filter riscv%,$(ARCH)),)
76-
SIMD_FLAG =
76+
SIMD_FLAG = -D__AVX2__
7777
OBJS = ${BASIC_OBJS} $(addprefix $(SRC_DIR)/, abpoa_align_simd.o)
7878
endif
7979

README.md

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,8 @@ significant speed improvement over existing tools.
8080
abPOA supports three alignment modes (global, local, extension) and flexible scoring schemes that allow linear, affine and convex gap penalties.
8181
It right now supports SSE2/SSE4.1/AVX2 vectorization.
8282
For `riscv64`, the current portability path uses the existing SIMDE-backed
83-
generic build rather than x86 runtime dispatch or a dedicated RVV backend.
83+
AVX2-style generic build rather than x86 runtime dispatch or a dedicated RVV
84+
backend.
8485

8586
For more information, please refer to our [paper](https://dx.doi.org/10.1093/bioinformatics/btaa963) published in Bioinformatics.
8687

setup.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@
2727
elif machine_arch in ["aarch32"]:
2828
simd_flag = ['-march=armv8-a+simd', '-mfpu=auto -D__AVX2__']
2929
elif machine_arch.startswith("riscv"):
30-
simd_flag = []
30+
simd_flag = ['-D__AVX2__']
3131
else: # x86_64
3232
simd_flag=['-march=native']
3333
if os.getenv('SSE4', False):

0 commit comments

Comments
 (0)