Add documentation for shift register component - #428
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WalkthroughA new section documenting the Shift Register component was added to the sequential elements chapter. The documentation explains the shift register’s function, properties, ports, behavior, and usage, including an example and figure reference. No code or interface changes were made; all modifications are limited to documentation content. Changes
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Actionable comments posted: 1
🧹 Nitpick comments (4)
docs/chapter4/6sequentialelements.md (4)
23-23: Add matching anchor in the top-level bullet listThe list now links to
#shift-register, but the section header is introduced much later in the file. That’s fine, yet remember to keep the bullet list itself in the same chronological/topic order you use for the section ordering (Shift Register currently comes after EEPROM). Double-check whether you want it grouped with the flip-flop family instead.
594-598: Align property call-outs with existing stylePrevious sections mark property names in bold (e.g., “BitWidth”). Here they are placed in back-ticks and the sentence starts with a
>quote block plus a horizontal rule. For visual and stylistic consistency across the chapter, drop the back-ticks (`) and the surrounding HR, and use the same pattern:-> Properties that can be customized in the **PROPERTIES** panel include: `Direction`, `BitWidth`, `Number of Stages`, `Parallel Load` +> Properties that can be customized in the **PROPERTIES** panel include: **Direction**, **BitWidth**, **Number of Stages**, **Parallel Load**
629-633: Property bullet list omits “Direction”The earlier call-out lists Direction, but the dedicated Property section doesn’t repeat it. Add it for completeness:
-**Bit Width**: Determines how many bits each stage stores — default is `1`. +**Bit Width**: Determines how many bits each stage stores — default is `1`. +**Direction**: `Left` or `Right` shift direction. Default is `Right`.
639-650: Clarify example narrative & units
- Mention the initial outputs before the first load so readers can see the transition.
- When you say “values shift right”, explicitly show the full vector before & after to avoid off-by-one confusion.
Consider rewriting the Example section accordingly for better pedagogical flow.
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docs/chapter4/6sequentialelements.md (1)
613-615: Replace placeholder figure index before merge
Figure X.Xis a temporary marker. Please update it to the next sequential figure number (looks like 4.26 in the filename, so “Figure 4.26”) to avoid broken cross-references later.
| - On **rising edge** of the `Clock`: | ||
| - If `Reset` is `1`: All outputs are cleared to `0`. | ||
| - Else if `S/L` is `1`: The values on `In0` to `InN` are **loaded** in parallel into the register stages. | ||
| - Else (`S/L` is `0`): The register **shifts** all stored values to the right, taking the new input from `First Input`. | ||
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🛠️ Refactor suggestion
Missing “Direction” behaviour description
The behaviour block implicitly assumes “shift right”. Because the component exposes a Direction property, explicitly state what happens when Direction = LEFT/RIGHT to prevent ambiguity:
-Else (`S/L` is `0`): The register **shifts** all stored values to the right, taking the new input from `First Input`.
+Else (`S/L` is `0`): The register **shifts** in the configured **Direction** (right by default), taking the new serial data from `First Input`.📝 Committable suggestion
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Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.
| - On **rising edge** of the `Clock`: | |
| - If `Reset` is `1`: All outputs are cleared to `0`. | |
| - Else if `S/L` is `1`: The values on `In0` to `InN` are **loaded** in parallel into the register stages. | |
| - Else (`S/L` is `0`): The register **shifts** all stored values to the right, taking the new input from `First Input`. | |
| - On **rising edge** of the `Clock`: | |
| - If `Reset` is `1`: All outputs are cleared to `0`. | |
| - Else if `S/L` is `1`: The values on `In0` to `InN` are **loaded** in parallel into the register stages. | |
| - Else (`S/L` is `0`): The register **shifts** in the configured **Direction** (right by default), taking the new serial data from `First Input`. |
🤖 Prompt for AI Agents
In docs/chapter4/6sequentialelements.md around lines 620 to 624, the description
of the register's behavior on the rising edge of the Clock assumes a right shift
without mentioning the Direction property. Update the text to explicitly
describe the behavior for both Direction = LEFT and Direction = RIGHT cases,
clarifying how the register shifts stored values accordingly to avoid ambiguity.
1 participant
Fixes #424
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