ISE @ UVCE (2027) | PR Lead, E-Cell UVCE
I focus on low-level systems and kernel development. Most of my actual engineering work happens upstream on the RTEMS Project infrastructure, not here.
Currently, I'm working on RTEMS 7 SMP-specifically porting the Flexible Multiprocessor Locking Protocol (FMLP) to the SuperCore and fixing processor dispatch symmetry issues. I also use the SPIN model checker (Promela) to formally verify locking primitives and task migration logic to ensure they hold up under stress.
Outside of core engineering, I lead the PR team at E-Cell UVCE, managing campus branding and guest engagements. This GitHub is mostly a staging ground for university labs, experimental scripts, and various forks. Check my GitLab or portfolio for the real work.
Portfolio: https://karthikeykadati.com/
Upstream Work: https://gitlab.rtems.org/karthikey_kadati