I am an Electronics & Communication Engineering student specializing in Computational Lithography and Machine Learning for Advanced Semiconductor Manufacturing. I am experienced in the numerical modeling of sub-wavelength fabrication processes, device physics simulation, and real-time statistical process control (SPC) for wafer yield optimization.

Semiconductor & Hardware:

AI & Machine Learning:

Programming & Frameworks:

• Engineered an open-source, Python-based computational simulation engine targeting sub-wavelength fabrication and pattern transfer profile validation.
• Implemented numerical modeling of the Rayleigh Criterion for resolution limits to optimize the k1 process factor for sub-7nm process development.
• Simulated etching dynamics and photoresist exposure under 13.5nm Extreme Ultraviolet (EUV) and 193nm immersion conditions to match industry-standard benchmarks.

• Developed a real-time yield excursion platform to reduce defective starts by 20-40% using time-series analytics on production wafer lots.
• Designed baseline-calibrated EWMA and CUSUM control charts generating immediate alarms with a 90% detection rate and a 5% false-alarm rate.
• Shortened root-cause analysis lag to 2 hours, helping process engineers catch drifts before yield crashes occur.

• Achieved 90% accuracy in semiconductor wafer defect classification to prevent process drift on 1,567 manufacturing runs.
• Optimized 8 ensemble machine learning models using stratified cross-validation to manage high-dimensional and imbalanced sensor arrays.
• Obtained a 95% ROC-AUC and 95% precision, providing a structured data-driven approach to yield management.

• Accomplished production-ready NLU for intent analysis as measured by successful zero-shot discovery and multimodal auditing.
• Architected a FastAPI microservice utilizing Groq Whisper (Audio) and Llama-3.2-Vision (Image).

• Designed an autonomous, real-time inference framework for low-power microcontrollers featuring proactive anomaly detection.
• Integrated TinyML models onto IoT edge devices, enabling autonomous hardware decisions and low-latency local processing.
• Maintained a minimal RAM/Flash footprint to run high-fidelity signal analysis without external cloud reliance.

• AI & ML Intern @ Infosys Springboard: Served as a Project Associate in the NLU Bot Trainer program, training and optimizing data pipelines for industrial intent classification.
• Embedded & IoT Intern @ Uni Convergence Technologies: Architected the CAPHA embedded system, deploying machine learning algorithms to anticipate user requirements.
• Product Intern @ Sri Nikhil Krishna Solutions (SNKS): Conducted high-precision electrical characterization and functional quality control procedures for optoelectronic PCB assemblies.

• LinkedIn: LinkedIn Profile
• GitHub: GitHub Profile