Implemented a pipelined processor simulator capable of executing machine code for encryption and decryption algorithms efficiently. Employed techniques such as forwarding and flushes to resolve data and control hazards, ensuring smooth execution and minimizing stalls in the pipeline.Optimized the performance of the non-pipelined processor by carefully managing clock cycles and minimizing latency in instruction execution. Achieved efficient encryption and decryption operations while maintaining a low clock cycle count.
Nishith0402/MIPS_Processor
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