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[Elementwise RTL] Adding elementwise RTL support for INT and UINT inputs#1570

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STFleming wants to merge 7 commits intodevfrom
feature/gen_rtleltwise
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[Elementwise RTL] Adding elementwise RTL support for INT and UINT inputs#1570
STFleming wants to merge 7 commits intodevfrom
feature/gen_rtleltwise

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This PR transforms the eltwisef unit into a more general eltwise RTL unit.

It generalises the original (float, float) -> float unit to allow for the following additional cases:

  • (float, int) -> (float)
  • (int, float) -> (float)
  • (int, int) -> int
  • (float, uint) -> (float)
  • (uint, float) -> (float)
  • (uint, uint) -> uint

Mixed uint and int precision is currently not premitted. Widths of operands must also match.

For the (float, int) -> (float) and (int, float) -> (float) cases the new unit is able to accept int inputs by converting them to float and using the original eltwisef logic. This is similar for the uint cases.

For the (int,int) -> int and (uint, uint) -> uint cases it leverages a new binopi module that performs binary operations on integer inputs. For multiplication this explicitly instantiates a DSP58 in a similar fashion to the binopf module, however, this is not the case for the ADD, SUB, and SBR operations. In the multiplication case the bitwidth is restricted to what a single DSP unit permits, in this case <= 24 bits for int and <= 23 bits for uint.

The eltwise module contains a single toplevel entity that is parameterised with the types and widths.
Each input is independently typed via A_FLOAT / B_FLOAT (1 = float, 0 = int | uint). When an input is integer, A_WIDTH / B_WIDTH set the bit width and A_SIGNED / B_SIGNED select signed (int) vs unsigned (uint) interpretation. Float inputs are always 32 bits; the width/signed parameters are ignored for them. No other floating point formats are currently supported.

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