0.32

What's Changed

• gowin: add latch pack/unpack support (DL-series primitives) by @zaun in #476
• Correct comments in examples. by @yrabbit in #481
• Disable fetching and merging of pull requests by @pepijndevos in #486
• GW5A HCLK. Add HCLK diagrams. by @yrabbit in #487
• Correct the syntax in Makefiles by @yrabbit in #488
• Fix images in hclk doc by @yrabbit in #489
• GW5A. Implement HCLK system. by @yrabbit in #490
• Build GW5A HCLK examples by @yrabbit in #491
• gowin_pack: fix PLLA _default_plla_inattrs integer type mismatch by @pinnacletechnologysolutionsltd in #492
• GW5A. Implement CLKDIV. by @yrabbit in #493
• Bump Yosys and Nextpnr stable versions by @yrabbit in #494
• GW5A. Implement deserializers. by @yrabbit in #495
• support loading device from json by @mia8973 in #480
• Add CLKDIV + OSER10 + TLVDS example by @yrabbit in #496
• Doc. Add CLKDIV and CLKDIV2 to the HCLK images by @yrabbit in #497

New Contributors

• @zaun made their first contribution in #476
• @pinnacletechnologysolutionsltd made their first contribution in #492
• @mia8973 made their first contribution in #480

Full Changelog: 0.31...0.32

0.31

What's Changed

• Add initial support for GW5AST-138C BSRAM by @gatecat in #463
• BUGFIX. true->TRUE by @yrabbit in #465
• GW5A. DSP. Mult12x12. MultAddAlu12x12. by @yrabbit in #448
• Add missing GW5AST-138C IO by @gatecat in #464
• Fix Docker workflow failing on PRs and switch to fastcrc by @pepijndevos in #469
• Replace crcmod with fastcrc for CRC-16 calculation by @pepijndevos in #468
• GW5AST-138 does need reset fix by @gatecat in #466
• Add hardware-in-the-loop CI test infrastructure by @pepijndevos in #461
• DSP 5A series. Implement MultAlu27x18. by @yrabbit in #470
• HIL: tweak for new tangnano20k firmware by @pepijndevos in #471
• nextpnr default branch is now main by @gatecat in #474
• GW5A DSP. Add example of MultAlu27x18 by @yrabbit in #472
• tm_parser: Fix typo, investigate value issues by @gatecat in #473
• make tangnano20k HIL work with custom firmware by @pepijndevos in #475
• GW5A DSP. Implement MULT27X36. by @yrabbit in #477
• GW5A. DSP. Add MULT27X36 example. by @yrabbit in #478
• Dual port BSRAM CE fix. by @yrabbit in #479

New Contributors

• @gatecat made their first contribution in #463

Full Changelog: 0.30...0.31

0.30

What's Changed

• Bump Yosys version by @yrabbit in #440
• Add msgspec to Docker image by @pepijndevos in #442
• Fix examples. by @yrabbit in #452
• Only push Docker image on push to master by @pepijndevos in #455
• Restructure CI: consolidate chipdb, split examples by board by @pepijndevos in #456
• optimize python packer by @pepijndevos in #453
• Replace pickle with msgspec MessagePack serialization by @pepijndevos in #454
• Speed up CI with ccache for yosys/nextpnr builds by @pepijndevos in #457
• Revert CI to upstream nextpnr by @pepijndevos in #458
• Clean up chipdb generation pipeline by @pepijndevos in #459
• Add a primitive comparison tool. by @yrabbit in #460
• BUGFIX. Restore PLL routing. by @yrabbit in #462

Full Changelog: 0.29...0.30

0.29

What's Changed

• 25A unusual IOs. by @yrabbit in #415
• Add a description of dedicated pins. by @yrabbit in #416
• Read information about banks from a DAT file. by @yrabbit in #417
• Read a list of alt IO functions from a DAT file. by @yrabbit in #418
• Add IOBUFs for GW5AST-138C by @yrabbit in #420
• Set fuses for unused I/O by @yrabbit in #421
• Bump the Yosys version by @yrabbit in #422
• Fix Tangmega138k overheating by @yrabbit in #423
• Doc. BSRAM in the GW5A series. by @yrabbit in #428
• Disable segment gates. by @yrabbit in #429
• Enable ‘Byte Enable’ on BSRAM. for all chips, including the 5A series. by @yrabbit in #430
• Add new wire tables. by @yrabbit in #431
• Set DSP regs defaults by @yrabbit in #435
• Implement GW5AST-138C clock system. by @yrabbit in #437
• Add TangMega138k examples. by @yrabbit in #438

Full Changelog: 0.28...0.29

0.28

What's Changed

• IO. Fix IOBUF. by @yrabbit in #399
• Bump Yosys version. by @yrabbit in #400
• GW5A. Fix CRC calc and add riscv/attosoc examples. by @yrabbit in #402
• GW5A. Fix a mistypes and CRC. by @yrabbit in #403
• Add TangPrimer25k SDRAM pins by @yrabbit in #405
• Remove mention of gowin_bba by @yrabbit in #407
• Gw5 sdpb by @yrabbit in #408
• GW5A. Fix examples. by @yrabbit in #410
• Bump the Yosys version to 0.59.1 by @yrabbit in #413
• GW5. Implement ADC. by @yrabbit in #412
• Fix reset pin and add some 138k parts. by @yrabbit in #414

Full Changelog: 0.27...0.28

0.27

What's Changed

• GW5A. BSRAM initialisation. by @yrabbit in #392
• PLL in a separate module. by @yrabbit in #394
• GW5A. Implement BSRAM. by @yrabbit in #395
• Add a speed grade aliases. by @yrabbit in #396

Full Changelog: 0.26...0.27

0.26

What's Changed

• Turn the logicinfo lists to the dictionaries. by @yrabbit in #385
• Fix ALU. by @yrabbit in #386
• Document the slots. by @yrabbit in #387
• Actually show unknown part type. by @yrabbit in #389
• GW5A. Implement PLLs. by @yrabbit in #388
• GW5A. BUGFIX. Bottom IOs. by @yrabbit in #390
• GW5A. Implement DCS by @yrabbit in #391

Full Changelog: 0.25...0.26

0.25

What's Changed

• Send the gate wires to the nextpnr. by @yrabbit in #381
• GW5A. Add OSC by @yrabbit in #379
• yosys-0.57 by @yrabbit in #382
• Add PLL parameter calculation for new chips. by @yrabbit in #383
• Bump nextpnr version to 0.9 by @yrabbit in #384

Full Changelog: 0.24...0.25

0.24

What's Changed

• Add a mechanism for fully arbitrary ALUs. by @yrabbit in #377
• GW5A. Masquerade for memory cells. by @yrabbit in #378

Full Changelog: 0.23...0.24

0.23

What's Changed

• Update chipdb.yml by @pepijndevos in #370
• Fix CI. by @yrabbit in #371
• Fix the central clock MUX check. by @yrabbit in #372
• GW5A. Add CIN MUX attributes. by @yrabbit in #373
• Modification of fuse installation in slice. by @yrabbit in #374
• GW5A. Enable ALU. by @yrabbit in #375
• GW5A. Add ALU and LUTRAM examples. by @yrabbit in #376

Full Changelog: 0.22...0.23