Optimize RVV backend for Deconvolution and QuantizedAdd#4547
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Co-authored-by: jxgxxx <1955992348@qq.com> Co-authored-by: typer-J <2236066784@qq.com> Co-authored-by: Sherlockzhangjinge <zjgzhangjinge@outlook.com> Co-authored-by: lyd1992 <liuyudong@iscas.ac.cn> Co-authored-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>
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Description
This PR introduces pure RISC-V Vector (RVV) architectural optimizations for the CPU backend, specifically targeting the
Deconvolution(weight transformationMNNDeconvTransformWeightC4) andQuantizedAddoperators.Performance Benchmarks:
MNNDeconvTransformWeightC4M/OC=130, K/IC=64, kernel=3x3, area=9, outC4=33MNNDeconvTransformWeightC4M/OC=128, K/IC=64, kernel=3x3, area=9, outC4=32CPUQuantizedAddelements=802816 (1x112x112x64), 1-thread, iter=200CPUQuantizedAddelements=802816 (1x112x112x64), 4-threads, iter=500Module
CPU (specifically RVV backend)
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Checklist
[Module:Type] Descriptionformat