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Build xilinx projects using the new cmake/Kconfig build system#3198

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buha merged 55 commits into
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cmake-xilinx
Jul 16, 2026
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Build xilinx projects using the new cmake/Kconfig build system#3198
buha merged 55 commits into
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cmake-xilinx

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@buha buha commented Jul 9, 2026

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Pull Request Description

Initial version is just a draft and is not complete

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)

PR Checklist

  • I have followed the Coding style guidelines
  • I have complied with the Submission Checklist
  • I have performed a self-review of the changes
  • I have commented my code, at least hard-to-understand parts
  • I have build all projects affected by the changes in this PR
  • I have tested in hardware affected projects, at the relevant boards
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe etc), if applies

@buha
buha force-pushed the cmake-xilinx branch 2 times, most recently from fe8e38b to f1bf486 Compare July 9, 2026 13:07
@buha
buha force-pushed the cmake-xilinx branch 4 times, most recently from ae4967b to 7673e94 Compare July 15, 2026 12:19
buha added 6 commits July 15, 2026 16:05
@buha
cmake: add Xilinx (Vitis) platform support
915b04a 
Bring up the Xilinx platform for the CMake/Kconfig build system, mirroring
the existing maxim/stm32 integration.

Unlike maxim/stm32, the linker script and BSP (xparameters.h + libxil.a)
are not static SDK files -- Vitis generates them per-project from the board
.xsa. config_xilinx_sdk() runs that generation at configure time, analogous
to how config_stm32_sdk() drives STM32CubeMX. The generation reuses the
existing HSI helper tools/scripts/platform/xilinx/util.tcl via xsct (the
Vitis 2025 Python util.py path is broken on 2025.1).

New files:
- drivers/platform/xilinx/toolchain.cmake: detects the processor arch from the
  .xsa (xsct get_arch), selects the matching bare-metal compiler from the Vitis
  install, sets CPU flags. HARDWARE (.xsa path) comes from -DHARDWARE= or the
  HARDWARE env var; cached and registered in CMAKE_TRY_COMPILE_PLATFORM_VARIABLES
  so CMake's ABI-probe sub-project sees it.
- drivers/platform/xilinx/CMakeLists.txt: -DXILINX_PLATFORM, adds xilinx_*.c per
  CONFIG_*_XILINX (arch-conditionality is handled inside the sources via BSP
  header #ifdefs).
- drivers/platform/xilinx/Kconfig: XILINX menu + per-driver symbols.
- cmake/xilinx/xilinx_platform_sdk.cmake: config_xilinx_sdk() runs the BSP +
  linker-script generation and wires includes/libs/lscript onto the targets.
- cmake/ide/backends/vitis.cmake: IDE backend stub (ide_config.cmake already
  dispatches xilinx -> vitis; the file was missing).
- board_configs/xilinx/{CMakePresets.json,zed_defconfig}: ZedBoard (Zynq-7000,
  cortexa9) preset + defconfig.

Wired into: root CMakePresets.json (include), drivers/platform/Kconfig
(source).

Assisted-by: Claude Opus 4.8
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
hello_world: move Xilinx build to CMake
f4944a6 
Migrate hello_world (Xilinx-only) to the CMake/Kconfig flow: add
CMakeLists.txt, Kconfig (single basic_example variant), basic.conf and the
zed board overlay; drop the legacy Makefile/builds.json/src.mk and the
platform src.mk. Source the project Kconfig from projects/Kconfig.

Assisted-by: Claude Opus 4.8
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
cmake: xilinx: wire up .xsa download and platform build fixes
c675d47 
Enable the Xilinx CMake flow to obtain the per-board .xsa the same way the
legacy Make build does, and fix platform-wide build gaps found while
migrating projects beyond hello_world.

.xsa download plumbing:
- no_os_build.py: add --hardware, forwarded to cmake as -DHARDWARE=<abs>
  in both the sequential and parallel build paths; add the reusable
  xilinx_hardware_name() helper (composes <design>_<board>).
- build_projects.py: add xilinx to CMAKE_PLATFORMS; resolve each combo's
  hardware name and pass the downloaded .xsa via --hardware.
- download_files.py: also collect hardware names from migrated projects'
  .conf files so their .xsa keeps being fetched after builds.json goes.
- Kconfig: add CONFIG_XILINX_HDL_DESIGN string; hello_world declares it.

Platform build fixes:
- toolchain.cmake: emit <project>.elf (CMAKE_EXECUTABLE_SUFFIX_*) like the
  maxim/stm32/pico toolchains, so the CI .elf success gate and FlashTools
  find it.
- zed_defconfig: enable every Xilinx platform driver at the board baseline
  (each gated by depends on <subsys>), so SPI/GPIO/I2C/TIMER projects link.
- xilinx CMakeLists: build xilinx_axi_io.c unconditionally; it provides
  no_os_axi_io_read/write needed by every axi_core driver.
- UART_XILINX selects IRQ and IRQ_XILINX; the PS UART driver is
  interrupt-driven and references xil_irq_ops unconditionally.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad719x: migrate Xilinx build to CMake/Kconfig
2fba8ab 
Convert the ad719x dummy_example from the legacy Make stack to the
CMake/Kconfig flow: add CMakeLists.txt, Kconfig (single dummy example
variant), dummy_example.conf declaring CONFIG_XILINX_HDL_DESIGN="adv7511"
and the empty zed board overlay. Drop the legacy Makefile, src.mk,
builds.json and the platform/examples src.mk fragments. Source the project
Kconfig from projects/Kconfig.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad4110: migrate Xilinx build to CMake/Kconfig
f570c92 
Convert the ad4110 uart example from the legacy Make stack to the
CMake/Kconfig flow: add CMakeLists.txt, Kconfig, uart.conf declaring
CONFIG_XILINX_HDL_DESIGN="ad4110" and the empty zed board overlay. Drop the
legacy Makefile, src.mk and builds.json. Source the project Kconfig from
projects/Kconfig.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad5758-sdz: migrate Xilinx build to CMake/Kconfig
70eceda 
Convert the ad5758-sdz example from the legacy Make stack to the
CMake/Kconfig flow: add CMakeLists.txt, Kconfig, example.conf declaring
CONFIG_XILINX_HDL_DESIGN="ad5758_sdz" and the empty zed board overlay. Drop
the legacy Makefile, src.mk and builds.json. Source the project Kconfig
from projects/Kconfig.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
buha added 24 commits July 16, 2026 10:46
@buha
ad9208: migrate Xilinx build to CMake/Kconfig
29caf71 
Convert the ad9208 demo and IIO examples from the legacy Make stack to the
CMake/Kconfig flow: add CMakeLists.txt, Kconfig (demo and iio variants),
demo.conf and iio.conf declaring CONFIG_XILINX_HDL_DESIGN="ad9208_dual_ebz"
and the empty vcu118 board overlays. The examples use the AXI ADC core,
DMAC, clkgen, JESD204 and the HMC7044 clock. Drop the legacy Makefile,
src.mk and builds.json. Source the project Kconfig from projects/Kconfig.

Register the ad9208 vendor API sources (ad9208_api/*.c) under
CONFIG_ADC_AD9208 in the adc CMakeLists; like ad9083 they were pulled by a
Make wildcard but never registered for CMake.

Emit only the ELF (plus a size summary) on xilinx, dropping the raw objcopy
.bin: on MicroBlaze the low/high section split makes `objcopy -O binary`
pad to multi-GB, and on xilinx the deployment artifact is the ELF (->
BOOT.BIN / .tar.gz), never a flat .bin. The CI gate keys off the .elf and
the export copies .bin only if present, so this is safe.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
cmake: xilinx: add zc702, zcu102_lvds and kcu105 presets
5afb864 
Add the remaining Tier C board presets and defconfigs:
- zc702 (Zynq-7000 / cortexa9) — used by ad9361
- zcu102_lvds (ZynqMP / cortexa53) — the adrv9001 LVDS variant
- kcu105 (Kintex UltraScale, MicroBlaze / sys_mb) — ad9361/ad9371/fmcdaq2

The cortexa9/cortexa53 defconfigs enable the full platform driver set;
kcu105 omits GPIO_IRQ_XILINX like vcu118 (PS-only xgpiops.h absent on
MicroBlaze). All arches are already validated (cortexa9, cortexa53,
sys_mb), so these are preset + defconfig only.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad9656_fmc: migrate Xilinx build to CMake/Kconfig
3a537ed 
Convert the ad9656_fmc demo and IIO examples from the legacy Make stack to
the CMake/Kconfig flow: add CMakeLists.txt, Kconfig (demo and iio
variants), demo.conf and iio.conf declaring
CONFIG_XILINX_HDL_DESIGN="ad9656_fmc" and the empty zcu102 board overlays.
The examples use the AXI ADC core, DMAC, clkgen, JESD204 and the
AD9508/AD9553 clocks. Drop the legacy Makefile, src.mk and builds.json.
Source the project Kconfig from projects/Kconfig.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
adrv902x: migrate Xilinx build to CMake/Kconfig
97eea01 
Convert the adrv902x basic, DMA and IIO examples from the legacy Make stack
to the CMake/Kconfig flow: add CMakeLists.txt, Kconfig (three variants),
one .conf per variant declaring CONFIG_XILINX_HDL_DESIGN="adrv9026" and the
empty zcu102 board overlays. The examples drive the ADRV9025 transceiver
over the AXI ADC/DAC cores, DMAC, clkgen and JESD204 with an AD9528 clock.
The madura driver's adrv9025.h pulls the project-provided no_os_platform.h,
so src/common/hal is added to the no-os include path. Drop the legacy
Makefile, src.mk, platform src.mk and builds.json. Source the project
Kconfig from projects/Kconfig.

Register the full madura vendor API tree (all .c under drivers/rf-
transceiver/madura, ~46 files) via no_os_sources_dir_recurse_ifdef under
CONFIG_RF_TRANSCEIVER_ADRV9025; the legacy Make pulled it via a recursive
SRC_DIRS wildcard but CMake had only two wrapper files registered, so
ADRV9025 never linked.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
adrv903x: migrate Xilinx build to CMake/Kconfig
ea80567 
Convert the adrv903x basic, DMA and IIO examples from the legacy Make stack
to the CMake/Kconfig flow: add CMakeLists.txt, Kconfig (three variants),
one .conf per variant declaring CONFIG_XILINX_HDL_DESIGN="adrv903x" and the
empty zcu102 board overlays. The examples drive the ADRV903x (palma)
transceiver over the AXI ADC/DAC cores, DMAC, clkgen and JESD204 with an
AD9528 clock. The palma driver's adrv903x.h pulls the project-provided
no_os_platform.h, so src/common/hal is added to the no-os include path.
Drop the legacy Makefile, src.mk, platform src.mk and builds.json. Source
the project Kconfig from projects/Kconfig.

Register the palma vendor API tree (all .c under drivers/rf-
transceiver/palma) via no_os_sources_dir_recurse_ifdef under a new
CONFIG_RF_TRANSCEIVER_ADRV903X symbol; CMake had no registration for it, so
the transceiver never linked.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
adrv9001: migrate Xilinx build to CMake/Kconfig
5015a72 
Convert the adrv9001 examples from the legacy Make stack to the
CMake/Kconfig flow. Five variants (demo, demo_adrv9002, dma_example, iio,
iio_adrv9002), each buildable on zcu102 and zcu102_lvds, declaring
CONFIG_XILINX_HDL_DESIGN="adrv9001" with empty board overlays per carrier.
The examples drive the ADRV9001/ADRV9002 (navassa) transceiver over the AXI
ADC/DAC cores and DMAC via the CMOS/LVDS SSI (no JESD, no external clkgen).
Per-variant bare defines (ADRV9002_RX2TX2, DMA_EXAMPLE, IIO_SUPPORT) are
emitted from CMakeLists; src/hal is added to the no-os include path for
no_os_platform.h. Drop the legacy Makefile, src.mk and builds.json. Source
the project Kconfig from projects/Kconfig.

Register the navassa vendor API tree (all .c under drivers/rf-
transceiver/navassa, incl third_party/jsmn) via
no_os_sources_dir_recurse_ifdef under CONFIG_RF_TRANSCEIVER_ADRV9002. Put
the navassa vendor defines (ADI_DYNAMIC_PROFILE_LOAD, ADI_COMMON_VERBOSE,
...) on the no-os target, not the project target: they gate driver bodies
(adi_adrv9001_profileutil_Parse) that compile into the no-os library, so a
PRIVATE project define would leave the symbol undefined at link.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
adrv904x: migrate Xilinx build to CMake/Kconfig
6065b8b 
Convert the adrv904x basic, DMA and IIO examples from the legacy Make stack
to the CMake/Kconfig flow: add CMakeLists.txt, Kconfig (three variants),
one .conf per variant declaring CONFIG_XILINX_HDL_DESIGN="adrv904x" and the
empty zcu102 board overlays. The examples drive the ADRV904x (koror)
transceiver over the AXI ADC/DAC cores, DMAC, clkgen and JESD204 with an
AD9528 clock. The koror driver includes the project-provided
no_os_platform.h and initdata.h, so src/common/hal and src/common are added
to the no-os include path. Drop the legacy Makefile, src.mk, platform
src.mk and builds.json. Source the project Kconfig from projects/Kconfig.

Register the koror vendor API tree (~74 .c files) via
no_os_sources_dir_recurse_ifdef under CONFIG_RF_TRANSCEIVER_ADRV904X.

Add the missing #include <stdbool.h> to koror platforms/
adi_library_types.h: that copy is v2.10 while platforms/adi_library.c is
v2.15 and now uses bool/true/false, so it failed to compile (the devices/
copy of the header already has the include). Matches the vendor's own newer
header.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad9172: migrate Xilinx build to CMake/Kconfig
9d23865 
Convert the ad9172 demo, IIO and DMA examples from the legacy Make stack to
the CMake/Kconfig flow. Three variants, each buildable on zc706 (cortexa9)
and zcu102 (cortexa53), declaring CONFIG_XILINX_HDL_DESIGN="dac_fmc_ebz"
with empty board overlays per carrier. The examples drive the AD9172 DAC
over the AXI DAC core, DMAC, clkgen and JESD204 with an HMC7044 clock;
iio/dma selectors are bare defines emitted from CMakeLists. Drop the legacy
Makefile, src.mk and builds.json. Source the project Kconfig from
projects/Kconfig.

Fix the AD917x driver registration in the dac CMakeLists: the source is
ad917x/ad9172.c (not ad917x/ad917x.c), and the four ad917x API sources
(ad917x_api.c, ad917x_jesd_api.c, ad917x_nco_api.c, ad917x_reg.c) were
never registered — CONFIG_DAC_AD917X now compiles all of them.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
adrv9009: migrate Xilinx build to CMake/Kconfig
244ff42 
Convert the adrv9009 examples (demo, adrv9008-1, adrv9008-2, dma_example,
iio) from the legacy Make stack to the CMake/Kconfig flow. Each is
buildable on zc706 (cortexa9) and zcu102 (cortexa53), declaring
CONFIG_XILINX_HDL_DESIGN="adrv9009" with empty board overlays per carrier.
The examples drive the ADRV9009 (talise) transceiver over the AXI ADC/DAC
cores, DMAC, clkgen and JESD204 with an AD9528 clock. Drop the legacy
Makefile, arm/zu/mb src.mk and builds.json. Source the project Kconfig from
projects/Kconfig.

Select the headless source by Xilinx arch (as the legacy per-arch src.mk
did): headless_arm.c + the explicit talise api/*.c list for cortexa9 and
cortexa53 (standard FMC card), headless_mb.c for MicroBlaze. The arm path
deliberately does NOT enable CONFIG_RF_TRANSCEIVER_ADRV9009: its adrv9009.c
wrapper and the project's app_talise.c both pull the talise arm/stream
binary blobs, which multiply-define; the arm app helpers use the raw talise
api directly instead. Register the talise vendor API tree under
CONFIG_RF_TRANSCEIVER_ADRV9009 for consumers that do use it.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
fmcdaq3: migrate Xilinx build to CMake/Kconfig
71772d1 
Convert the fmcdaq3 demo and IIO examples from the legacy Make stack to the
CMake/Kconfig flow. Two variants, each buildable on zc706 (cortexa9) and
zcu102 (cortexa53), declaring CONFIG_XILINX_HDL_DESIGN="daq3" with empty
board overlays per carrier. The examples drive the AD9152 DAC and AD9680
ADC over the AXI ADC/DAC cores, DMAC, clkgen and JESD204 (RX+TX) with an
AD9528 clock. Drop the legacy Makefile, src.mk and builds.json. Source the
project Kconfig from projects/Kconfig.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad9081: migrate Xilinx build to CMake/Kconfig
1c84aed 
Convert the ad9081 demo and IIO examples from the legacy Make stack to the
CMake/Kconfig flow. Two variants, each buildable on vcu118 (MicroBlaze) and
zcu102 (cortexa53), declaring CONFIG_XILINX_HDL_DESIGN="ad9081_fmca_ebz"
with empty board overlays per carrier. The examples drive the AD9081 MxFE
(ADC+DAC) over the AXI ADC/DAC cores, DMAC, clkgen and JESD204 with an
HMC7044 clock. Drop the legacy Makefile, src.mk and builds.json. Source the
project Kconfig from projects/Kconfig.

Register the ad9081 vendor API sources (ad9081/api/adi_ad9081_*.c) under
CONFIG_ADC_AD9081 in the adc CMakeLists; the include dirs were present but
the API .c files were never registered for CMake.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad9371: migrate Xilinx build to CMake/Kconfig
b79694e 
Convert the ad9371 demo, IIO and DMA examples from the legacy Make stack to
the CMake/Kconfig flow. Three variants, each buildable on kcu105
(MicroBlaze), zc706 (cortexa9) and zcu102 (cortexa53), declaring
CONFIG_XILINX_HDL_DESIGN="adrv9371x" with empty board overlays per carrier.
The examples drive the AD9371 (mykonos) transceiver over the AXI ADC/DAC
cores, DMAC, clkgen and JESD204 with an AD9528 clock. The single
src/app/headless.c selects PS vs PL internally via BSP macros; the
MicroBlaze build gets -DPLATFORM_MB. Drop the legacy Makefile, src.mk and
builds.json. Source the project Kconfig from projects/Kconfig.

The mykonos vendor API lives entirely in the project's src/devices tree
(not a shared library driver), so its sources and profile/init headers are
added to the no-os target directly; no drivers/rf-transceiver change.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
fmcdaq2: migrate Xilinx build to CMake/Kconfig
1fe5094 
Convert the fmcdaq2 demo, IIO and DMA examples from the legacy Make stack
to the CMake/Kconfig flow. Three variants, each buildable on kcu105
(MicroBlaze), zc706 (cortexa9) and zcu102 (cortexa53), declaring
CONFIG_XILINX_HDL_DESIGN="daq2" with empty board overlays per carrier. The
examples drive the AD9144 DAC and AD9680 ADC over the AXI ADC/DAC cores,
DMAC, clkgen and JESD204 (RX+TX) with an AD9523 clock. The single
src/app/fmcdaq2.c selects PS vs PL via BSP macros; the MicroBlaze build
gets -DPLATFORM_MB. Drop the legacy Makefile, src.mk and builds.json.
Source the project Kconfig from projects/Kconfig.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad9361: migrate Xilinx build to CMake/Kconfig
543ac43 
Convert the ad9361 examples from the legacy Make stack to the CMake/Kconfig
flow. Six variants: demo, iio, dma-example, dma-irq-example (fmcomms2) and
demo_fmcomms5, iio_fmcomms5 (fmcomms5). The fmcomms2 variants build on
zed/zc702/zc706/zcu102/kcu105; the fmcomms5 variants on zc702/zc706/zcu102.
Design prefix is per variant group (fmcomms2 vs fmcomms5), set in each
variant .conf via CONFIG_XILINX_HDL_DESIGN, with empty board overlays per
carrier. The examples drive the AD9361/AD9364 (and dual AD9361 for
fmcomms5) over the AXI ADC/DAC cores, DMAC, clkgen and the AXI system-id
core. The single src/main.c selects PS vs PL via BSP macros and gets
-DPLATFORM_MB on MicroBlaze; per-variant selectors (IIO_SUPPORT,
DMA_EXAMPLE, DMA_IRQ_ENABLE, FMCOMMS5) are emitted from CMakeLists. Drop
the legacy Makefile, src.mk and builds.json. Source the project Kconfig
from projects/Kconfig.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad463x_fmcz: migrate Xilinx build to CMake, drop legacy Make
56c6fd7 
Complete the CMake migration of ad463x_fmcz: the maxim/stm32 side was
already on CMake; wire up the remaining Xilinx (zed) build. Add empty
boards/{basic,iio}/zed.conf and declare CONFIG_XILINX_HDL_DESIGN=
"ad4630_fmc" in the shared basic.conf/iio.conf. The existing ${PLATFORM}
CMakeLists already covers src/platform/xilinx; on Xilinx the SPI-engine-
offload path is taken automatically (USE_STANDARD_SPI is default y only on
STM32), so no extra compile define is needed.

Xilinx was the last platform still on the legacy Make stack, so remove
builds.json, Makefile, src.mk and the platform/example src.mk fragments;
the project is now CMake-only.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
ad738x_fmcz: migrate Xilinx build to CMake, drop legacy Make
fc75b4e 
Complete the CMake migration of ad738x_fmcz: the stm32 side was already on
CMake; wire up the remaining Xilinx (zed) build. Add empty
boards/{basic,iio}/zed.conf, declare CONFIG_XILINX_HDL_DESIGN= "ad738x_fmc"
in the shared confs, and add the AXI core enables the Xilinx SPI-engine
path needs (they are inert on stm32, where AXI usage is behind #ifdef
XILINX_PLATFORM). The xilinx main.c selects the example via bare
BASIC_EXAMPLE/IIO_EXAMPLE defines, now emitted from CMakeLists under the
existing CONFIG_*_EXAMPLE gates.

Xilinx was the last platform on the legacy Make stack, so remove
builds.json, Makefile, src.mk and the platform/example src.mk fragments;
the project is now CMake-only.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
pulsar-adc: migrate Xilinx build to CMake, drop legacy Make
9cccd4e 
Wire up the remaining Xilinx (zed) build: add empty boards/{basic,iio}/
zed.conf, declare CONFIG_XILINX_HDL_DESIGN="pulsar_adc", and enable the AXI
cores the SPI-engine path needs (clkgen, dmac, pwmgen) plus CONFIG_PWM, all
inert on stm32. Xilinx was the last legacy platform, so remove builds.json,
Makefile and the src.mk fragments; the project is now CMake-only.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
iio_demo: migrate Xilinx build to CMake, drop legacy Make
e5a673c 
Wire up the remaining Xilinx (zed) build: add an empty boards/iio/zed.conf
and declare CONFIG_XILINX_HDL_DESIGN="pulsar_adc" in iio.conf. iio_demo is
a pure software IIO demo, so no device driver or AXI is needed on xilinx.
Xilinx was the last legacy platform, so remove builds.json, Makefile and
the src.mk fragments; the project is now CMake-only.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
cmake: xilinx: cache BSP across CI runs, clean objects only
22a67f9 
BSP generation runs xsct and takes 2-3 min, so preserve xsa_work/ across CI
runs: when the .xsa is unchanged, clean only .o/.elf via cmake --target
clean and build incrementally; force --fresh only on a new .xsa or a
missing build dir. Mirrors the legacy make clean/reset split.

Assisted-by: Claude Sonnet 4.5
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
tools: scripts: download_files: survive per-hardware errors
192f465 
The Cloudsmith helper raises on transient API failures and duplicate/
missing packages, and download_files.py had no guard, so one failing
hardware aborted the whole scan. Wrap each per-hardware lookup in
try/except and guard the log-only properties call separately.

Assisted-by: Claude Opus 4.8
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
tools: scripts: build_projects: fail loudly on hw download error
8835923 
On a non-zero exit from download_files.py the function did a bare return,
yielding None, which the caller unpacked as a tuple and died with a
cryptic TypeError. Exit with the child's status and an error line so the
real download failure surfaces.

Assisted-by: Claude Opus 4.8
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
tools: scripts: download_files: skip non-xilinx boards in .conf scan
5ce17f4 
CONFIG_XILINX_HDL_DESIGN applies to every board of a variant, so a mixed
project composed names like pulsar_adc_max32650fthr that never exist on
sdg-hdl, each triggering a 30-timestamp walk-back of wasted API calls.
Restrict the scan to boards that actually have a xilinx preset.

Assisted-by: Claude Opus 4.8
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
tools: scripts: avoid Vitis-bundled cmake on xilinx builds
b72dee8 
Sourcing settings64.sh prepends Vitis's ancient bundled cmake to PATH; it
is linked against libs absent on modern distros and dies during Configure.
Add _resolve_cmake() to pick the first non-Vitis cmake on PATH, exported as
CMAKE and used for every cmake invocation.

Assisted-by: Claude Opus 4.8
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha
tools: scripts: build_projects: force --fresh on stale xilinx cache
091d4e3 
CI agents check the repo out under different absolute paths, so a cached
build dir from another agent holds a CMakeCache.txt whose source no longer
matches and the object-only clean path fails on it. Detect the mismatch via
CMAKE_HOME_DIRECTORY and force --fresh, which rewrites the cache but leaves
the BSP in place.

Assisted-by: Claude Opus 4.8
Signed-off-by: Darius Berghe <darius.berghe@analog.com>
@buha

buha commented Jul 16, 2026

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  • fix more doc issues

@buha
buha merged commit c8005c2 into main Jul 16, 2026
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@buha
buha deleted the cmake-xilinx branch July 16, 2026 08:43
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