Add lcc_st_trans test and testplan updates

docs/testplan.hjson

@@ -209,6 +209,18 @@
         caliptra_ss_lcc_st_trans
       ]
     }
+    {
+      name: caliptra_ss_lcc_st_trans_all_states
+      desc: '''
+Perform transitions through all possible states.
+This is done to not depend on randomization to toggle all state bits.
+            '''
+      stage: ""
+      tests:
+      [
+        caliptra_ss_lcc_st_trans_all_states
+      ]
+    }
     {
       name: caliptra_ss_lcc_st_trans_invalid_state
       desc: ""
@@ -345,7 +357,9 @@ Perform a write through the MCI SRAM controller, followed by the double ECC erro
 Test should result in ECC error being raised and data inside SRAM should not be modified.
             '''
       stage: ""
-      tests: [mci_sram_error]
+      tests: [
+        mci_sram_error
+      ]
     }
     {
       name: mci_trace_buffer_axi_access
@@ -364,7 +378,9 @@ Inject invalid state into `otp_static_state` and verify that caliptra-ss becomes
 Release error injection and check that caliptra-ss is once more in unlocked state.
             '''
       stage: ""
-      tests: [mci_lcc_state_error]
+      tests: [
+        mci_lcc_state_error
+      ]
     }
     {
       name: mci_lcc_state_error_to_locked
@@ -375,7 +391,9 @@ Request scrap transition or inject state_error, release error injection and chec
 caliptra-ss is no longer unlocked and in the `DEVICE_PRODUCTION`.
             '''
       stage: ""
-      tests: [mci_lcc_state_error_to_locked]
+      tests: [
+        mci_lcc_state_error_to_locked
+      ]
     }
     {
       name: mci_lcc_manuf_to_non_debug
@@ -390,7 +408,9 @@ Either issue a SCRAP request or inject a state error, then verify that device li
       name: mci_lcc_no_zeroization
       desc: "Set one of the `cptra_ss_FIPS_ZEROIZATION_PPD_i` or `ss_soc_MCU_ROM_zeroization_mask_reg` and make sure that OTP was not zeroized."
       stage: ""
-      tests: [mci_lcc_no_zeroization]
+      tests: [
+        mci_lcc_no_zeroization
+      ]
     }
     {
       name: mci_read_all_regs_test
@@ -553,15 +573,6 @@ Either issue a SCRAP request or inject a state error, then verify that device li
         smoke_test_error_handling
       ]
     }
-    {
-      name: smoke_test_fc_debug_unlock_token
-      desc: ""
-      stage: ""
-      tests:
-      [
-        smoke_test_fc_debug_unlock_token
-      ]
-    }
     {
       name: smoke_test_fc_key_revocation
       desc: ""
@@ -625,24 +636,6 @@ Either issue a SCRAP request or inject a state error, then verify that device li
         smoke_test_fc_unlock_transitions
       ]
     }
-    {
-      name: smoke_test_fuse_prov_with_axi_id
-      desc: ""
-      stage: ""
-      tests:
-      [
-        smoke_test_fuse_prov_with_axi_id
-      ]
-    }
-    {
-      name: smoke_test_fuse_zeroize
-      desc: ""
-      stage: ""
-      tests:
-      [
-        smoke_test_fuse_zeroize
-      ]
-    }
     {
       name: smoke_test_jtag_lcc_registers
       desc: ""
@@ -1085,34 +1078,7 @@ Perform 64-bit access to MCI SRAM using JTAG to system bus path.
       stage: ""
       tests:
       [
-        caliptra_ss_lcc_st_trans_cnt
-      ]
-    }
-    {
-      name: caliptra_ss_lc_st_trans_tap_dummy
-      desc: "Allow LCC state transitions by writing 1 through TAP to TRANSITION_REGWEN followed by writing 0 to TRANSITION_CMD"
-      stage: ""
-      tests:
-      [
-        caliptra_ss_lc_st_trans_tap_dummy
-      ]
-    }
-    {
-      name: caliptra_ss_lc_part_error
-      desc: "Test if the LCC OTP partition error bit is sticky. Inject otp_lc_data_i.error asserted for at least two consecutive clock cycles"
-      stage: ""
-      tests:
-      [
-        caliptra_ss_lc_part_error
-      ]
-    }
-    {
-      name: caliptra_ss_lc_fatal_bus_integ_error
-      desc: "Test if the fatal bus integrity error flag is sticky. Trigger a CSR/TAP bus integrity error twice. Do this in all possible combinations (randomized)"
-      stage: ""
-      tests:
-      [
-        caliptra_ss_lc_fatal_bus_integ_error
+        caliptra_ss_lcc_volatile_unlock_cnt
       ]
     }
     {

src/integration/stimulus/L1_Nightly_Directed_caliptra_ss_top_tb_regression.yml

@@ -93,3 +93,4 @@ contents:
         $CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_lcc_volatile_unlock_wrong_token/caliptra_ss_lcc_volatile_unlock_wrong_token: { weight: 100 }
         $CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_registers/caliptra_ss_fuse_ctrl_registers: { weight: 100 }
         $CALIPTRA_SS_ROOT/src/integration/test_suites/smoke_test_fc_secret_prog_in_dbg/smoke_test_fc_secret_prog_in_dbg: { weight: 100 }
+        $CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_lcc_st_trans_all_states/caliptra_ss_lcc_st_trans_all_states: { weight: 100 }

src/integration/test_suites/caliptra_ss_lcc_st_trans_all_states/caliptra_ss_lcc_st_trans_all_states.c

@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: Apache-2.0
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <string.h>
+#include <stdint.h>
+#include <time.h>
+#include <stdlib.h>
+
+#include "soc_address_map.h"
+#include "printf.h"
+#include "riscv_hw_if.h"
+#include "soc_ifc.h"
+#include "caliptra_ss_lc_ctrl_address_map.h"
+#include "caliptra_ss_lib.h"
+#include "fuse_ctrl.h"
+#include "lc_ctrl.h"
+
+volatile char* stdout = (char *)SOC_MCI_TOP_MCI_REG_DEBUG_OUT;
+#ifdef CPT_VERBOSITY
+    enum printf_verbosity verbosity_g = CPT_VERBOSITY;
+#else
+    enum printf_verbosity verbosity_g = LOW;
+#endif
+
+static uint32_t tokens[13][4] = {
+    [RAU] = {CPTRA_SS_LC_CTRL_RAW_UNLOCK_TOKEN},              // RAW_UNLOCK
+    [TU1] = {0x72f04808, 0x05f493b4, 0x7790628a, 0x318372c8}, // TEST_UNLOCKED1
+    [TU2] = {0x17c78a78, 0xc7b443ef, 0xd6931045, 0x55e74f3c}, // TEST_UNLOCKED2
+    [TU3] = {0x1644aa12, 0x79925802, 0xdbc26815, 0x8597a5fa}, // TEST_UNLOCKED3
+    [TU4] = {0x34d1ea6e, 0x121f023f, 0x6e9dc51c, 0xc7439b6f}, // TEST_UNLOCKED4
+    [TU5] = {0x03fd9df1, 0x20978af4, 0x49db216d, 0xb0225ece}, // TEST_UNLOCKED5
+    [TU6] = {0xcfc0871c, 0xc400e922, 0x4290a4ad, 0x7f10dc89}, // TEST_UNLOCKED6
+    [TU7] = {0x67e87f3e, 0xae6ee167, 0x802efa05, 0xbaaa3138}, // TEST_UNLOCKED7
+    [TEX] = {0x2f533ae9, 0x341d2478, 0x5f066362, 0xb5fe1577}, // TEST_EXIT
+    [DEX] = {0xf622abb6, 0x5d8318f4, 0xc721179d, 0x51c001f2}, // DEV_EXIT
+    [PEX] = {0x25b8649d, 0xe7818e5b, 0x826d5ba4, 0xd6b633a0}, // PROD_EXIT
+    [RMU] = {0x72f04808, 0x05f493b4, 0x7790628a, 0x318372c8}, // RMA
+    [ZER] = {0}                                               // ZERO
+};
+
+void main (void) {
+    VPRINTF(LOW, "=================\nMCU Caliptra Boot Go\n=================\n\n")
+
+    uint8_t result = TB_CMD_TEST_PASS;
+
+    mcu_cptra_init_d();
+    wait_dai_op_idle(0);
+
+    // Randomly choose the next LC state among the all valid ones
+    // based on the current state and repeat this until the SCRAP
+    // state is reached.
+    while (1) {
+        lcc_initialization();
+        force_PPD_pin();
+
+        uint32_t lc_state_curr = read_lc_state();
+        uint32_t lc_cnt_curr = read_lc_counter();
+        uint32_t lc_cnt_next = lc_cnt_curr + 1; 
+
+        VPRINTF(LOW, "INFO: current lcc state: %d\n", lc_state_curr);
+        VPRINTF(LOW, "INFO: current lc cntc state: %d\n", lc_cnt_curr);
+
+        if (lc_cnt_curr == 24) {
+            VPRINTF(LOW, "INFO: reached max. LC counter value, finish test test\n");
+            goto epilogue;
+        }
+
+        uint32_t lc_state_next = lc_state_curr + 1;
+
+        if (lc_state_curr == PROD_END) {
+            // Transition from PROD_END to RMA is invalid, skip it
+            lc_state_next += 1;
+        }
+        VPRINTF(LOW, "INFO: next lcc state: %d\n", lc_state_next);
+
+        lc_token_type_t token_type = trans_matrix[lc_state_curr][lc_state_next];
+        transition_state(lc_state_next,
+                         tokens[token_type][0],
+                         tokens[token_type][1],
+                         tokens[token_type][2],
+                         tokens[token_type][3],
+                         token_type != ZER);
+
+        if (lc_state_next != SCRAP) {
+            wait_dai_op_idle(0);
+
+            lc_state_curr = read_lc_state();
+            if (lc_state_curr != lc_state_next) {
+                VPRINTF(LOW, "ERROR: incorrect state: exp: %d, act: %d\n", lc_state_next, lc_state_curr);
+                result = TB_CMD_TEST_FAIL;
+                goto epilogue;
+            }
+            lc_cnt_curr = read_lc_counter();
+            if (lc_cnt_curr != lc_cnt_next) {
+                VPRINTF(LOW, "ERROR: incorrect counter: exp: %d, act: %d\n", lc_cnt_next, lc_cnt_curr);
+                result = TB_CMD_TEST_FAIL;
+                goto epilogue;
+            }
+        } else {
+            VPRINTF(LOW, "INFO: scrap state reached; terminating test\n");
+            goto epilogue;
+        }
+    }
+
+epilogue:
+    for (uint8_t i = 0; i < 160; i++) {
+        __asm__ volatile ("nop"); // Sleep loop as "nop"
+    }
+
+    SEND_STDOUT_CTRL(result);
+}

src/integration/test_suites/caliptra_ss_lcc_st_trans_all_states/caliptra_ss_lcc_st_trans_all_states.yml

@@ -0,0 +1,10 @@
+---
+seed: ${PLAYBOOK_RANDOM_SEED}
+testname: caliptra_ss_lcc_st_trans_all_states
+pre-exec: |
+  echo "Running pre_exec for [caliptra_ss_lcc_st_trans_all_states]"
+  echo "Generate RAW LC start state and LC counter value set to 0."
+  rm -rf otp-img.2048.vmem
+  $CALIPTRA_SS_ROOT/tools/scripts/fuse_ctrl_script/gen_fuse_ctrl_vmem.py --seed ${PLAYBOOK_RANDOM_SEED} --lc-state 0 --lc-cnt 0 --lc-state-def $CALIPTRA_SS_ROOT/tools/scripts/fuse_ctrl_script/lc_ctrl_state.hjson --mmap-def $CALIPTRA_SS_ROOT/src/fuse_ctrl/data/otp_ctrl_mmap.hjson --token-configuration $CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_lcc_st_trans_all_states/test_unlock_token.hjson -o otp-img.2048.vmem
+  CALIPTRA_ROOT=$CALIPTRA_SS_ROOT/third_party/caliptra-rtl make -f $CALIPTRA_SS_ROOT/third_party/caliptra-rtl/tools/scripts/Makefile CALIPTRA_INTERNAL_TRNG=0 TESTNAME=smoke_test_mbox program.hex
+  make -f $CALIPTRA_SS_ROOT/tools/scripts/Makefile TESTNAME=caliptra_ss_lcc_st_trans_all_states mcu_program.hex

src/integration/test_suites/caliptra_ss_lcc_st_trans_all_states/test_unlock_token.hjson

@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: Apache-2.0
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+
+{
+    "CPTRA_SS_TEST_UNLOCK_TOKEN_1": 0x318372c87790628a05f493b472f04808
+    "CPTRA_SS_TEST_UNLOCK_TOKEN_2": 0x55e74f3cd6931045c7b443ef17c78a78
+    "CPTRA_SS_TEST_UNLOCK_TOKEN_3": 0x8597a5fadbc26815799258021644aa12
+    "CPTRA_SS_TEST_UNLOCK_TOKEN_4": 0xc7439b6f6e9dc51c121f023f34d1ea6e
+    "CPTRA_SS_TEST_UNLOCK_TOKEN_5": 0xb0225ece49db216d20978af403fd9df1
+    "CPTRA_SS_TEST_UNLOCK_TOKEN_6": 0x7f10dc894290a4adc400e922cfc0871c
+    "CPTRA_SS_TEST_UNLOCK_TOKEN_7": 0xbaaa3138802efa05ae6ee16767e87f3e
+    "CPTRA_SS_TEST_EXIT_TO_MANUF_TOKEN": 0xb5fe15775f066362341d24782f533ae9
+    "CPTRA_SS_MANUF_TO_PROD_TOKEN": 0x51c001f2c721179d5d8318f4f622abb6
+    "CPTRA_SS_PROD_TO_PROD_END_TOKEN": 0xd6b633a0826d5ba4e7818e5b25b8649d
+    "CPTRA_SS_RMA_TOKEN": 0x318372c87790628a05f493b472f04808
+}

src/integration/test_suites/libs/caliptra_ss_lib/caliptra_ss_lib.h

@@ -58,8 +58,8 @@
 #define CMD_LC_TRIGGER_ESCALATION1_DIS  FC_LCC_CMD_OFFSET + 0x1C
 #define CMD_LC_KMAC_ERR_INJECTION       FC_LCC_CMD_OFFSET + 0x1D
 #define CMD_LC_KMAC_ERR_INJECTION_DIS   FC_LCC_CMD_OFFSET + 0x1E
-#define CMD_MCI_INJECT_STATE_ERROR      FC_LCC_CMD_OFFSET + 0x1F
-#define CMD_MCI_RELEASE_STATE_ERROR     FC_LCC_CMD_OFFSET + 0x20
+#define CMD_LC_INJECT_STATE_ERROR       FC_LCC_CMD_OFFSET + 0x1F
+#define CMD_LC_RELEASE_STATE_ERROR      FC_LCC_CMD_OFFSET + 0x20
 #define CMD_MCI_SRAM_DMI_ACCESS         FC_LCC_CMD_OFFSET + 0x21
 #define CMD_MCI_SRAM_DMI_ACCESS_DIS     FC_LCC_CMD_OFFSET + 0x22
 

src/integration/test_suites/mci_lcc_state_error/mci_lcc_state_error.c

@@ -65,7 +65,7 @@ void main(void) {
 
     // Force state_error high via the testbench service.
     VPRINTF(LOW, "INFO: injecting state_error into MCI LCC state translator\n");
-    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_MCI_INJECT_STATE_ERROR);
+    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_LC_INJECT_STATE_ERROR);
 
     // Poll until debug_locked == 1.
     uint32_t locked = 0;
@@ -85,7 +85,7 @@ void main(void) {
 
     // Release the injected state_error.
     VPRINTF(LOW, "INFO: releasing state_error injection\n");
-    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_MCI_RELEASE_STATE_ERROR);
+    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_LC_RELEASE_STATE_ERROR);
 
     // Reset FC/LCC/MCI to recover the unlocked state.
     // After reset the translator will re-evaluate OTP state (still TEST_UNLOCKED0)

src/integration/test_suites/mci_lcc_state_error_to_locked/mci_lcc_state_error_to_locked.c

@@ -83,7 +83,7 @@ void main(void) {
 
     // Inject state_error.
     VPRINTF(LOW, "INFO: injecting state_error into MCI LCC state translator\n");
-    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_MCI_INJECT_STATE_ERROR);
+    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_LC_INJECT_STATE_ERROR);
 
     // Poll until debug_locked==1.
     uint32_t locked = 0;
@@ -113,7 +113,7 @@ void main(void) {
 
     // Release the injected state_error.
     VPRINTF(LOW, "INFO: releasing state_error injection\n");
-    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_MCI_RELEASE_STATE_ERROR);
+    lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_LC_RELEASE_STATE_ERROR);
 
     // Allow a few cycles to settle.
     for (uint8_t i = 0; i < 32; i++) {

src/integration/testbench/caliptra_ss_tb_cmd_list.svh

@@ -108,8 +108,8 @@ localparam CMD_LC_TRIGGER_ESCALATION0_DIS   = FC_LCC_CMD_OFFSET + 8'h1B;
 localparam CMD_LC_TRIGGER_ESCALATION1_DIS   = FC_LCC_CMD_OFFSET + 8'h1C;
 localparam CMD_LC_KMAC_ERR_INJECTION        = FC_LCC_CMD_OFFSET + 8'h1D;
 localparam CMD_LC_KMAC_ERR_INJECTION_DIS    = FC_LCC_CMD_OFFSET + 8'h1E;
-localparam CMD_MCI_INJECT_STATE_ERROR       = FC_LCC_CMD_OFFSET + 8'h1F;
-localparam CMD_MCI_RELEASE_STATE_ERROR      = FC_LCC_CMD_OFFSET + 8'h20;
+localparam CMD_LC_INJECT_STATE_ERROR        = FC_LCC_CMD_OFFSET + 8'h1F;
+localparam CMD_LC_RELEASE_STATE_ERROR       = FC_LCC_CMD_OFFSET + 8'h20;
 localparam CMD_MCI_SRAM_DMI_ACCESS          = FC_LCC_CMD_OFFSET + 8'h21;
 localparam CMD_MCI_SRAM_DMI_ACCESS_DIS      = FC_LCC_CMD_OFFSET + 8'h22;
 

src/integration/testbench/fc_lcc_tb_services.sv

@@ -165,11 +165,11 @@ module fc_lcc_tb_services (
             $display("fc_lcc_tb_services: releasing KMAC error injection");
             release `LCC_PATH.kmac.sha3_err.valid;
           end
-          CMD_MCI_INJECT_STATE_ERROR: begin
+          CMD_LC_INJECT_STATE_ERROR: begin
             $display("fc_lcc_tb_services: injecting state_error into MCI LCC state translator");
             force `MCI_PATH.lc_fatal_state_error_i = 1'b1;
           end
-          CMD_MCI_RELEASE_STATE_ERROR: begin
+          CMD_LC_RELEASE_STATE_ERROR: begin
             $display("fc_lcc_tb_services: releasing state_error injection in MCI LCC state translator");
             release `MCI_PATH.lc_fatal_state_error_i;
           end