Panthor with 1GHz frequency

Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml

@@ -38,14 +38,15 @@ properties:
 
   clocks:
     minItems: 1
-    maxItems: 3
+    maxItems: 4
 
   clock-names:
     minItems: 1
     items:
       - const: core
       - const: coregroup
       - const: stacks
+      - const: bus
 
   mali-supply: true
 

arch/arm64/boot/dts/rockchip/rk3588s.dtsi

@@ -2391,11 +2391,11 @@
 		compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
 		reg = <0x0 0xfb000000 0x0 0x200000>;
 		#cooling-cells = <2>;
-		assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
-		assigned-clock-rates = <200000000>;
-		clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
-			 <&cru CLK_GPU_STACKS>;
-		clock-names = "core", "coregroup", "stacks";
+		assigned-clocks = <&cru CLK_GPU>, <&scmi_clk SCMI_CLK_GPU>;
+		assigned-clock-rates = <198000000>, <200000000>;
+		clocks = <&scmi_clk SCMI_CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
+			 <&cru CLK_GPU_STACKS>, <&cru CLK_GPU>;
+		clock-names = "core", "coregroup", "stacks", "bus";
 		dynamic-power-coefficient = <2982>;
 		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
@@ -2408,6 +2408,11 @@
 		gpu_opp_table_panthor: opp-table {
 			compatible = "operating-points-v2";
 
+			opp-200000000 {
+				opp-hz = /bits/ 64 <200000000>;
+				opp-microvolt = <675000 675000 850000>;
+				opp-suspend;
+			};
 			opp-300000000 {
 				opp-hz = /bits/ 64 <300000000>;
 				opp-microvolt = <675000 675000 850000>;

drivers/gpu/drm/panthor/panthor_devfreq.c

@@ -122,6 +122,42 @@ static struct devfreq_dev_profile panthor_devfreq_profile = {
 	.get_dev_status = panthor_devfreq_get_dev_status,
 };
 
+static int panthor_devfreq_config_clks(struct device *dev,
+				       struct opp_table *opp_table,
+				       struct dev_pm_opp *opp,
+				       void *data, bool scaling_down)
+{
+	struct panthor_device *ptdev = dev_get_drvdata(dev);
+	unsigned long *target = data;
+	unsigned long freq;
+	int ret = 0;
+
+	if (!pm_runtime_enabled(dev))
+		return 0;
+
+	/* One of target and opp must be available */
+	if (target) {
+		freq = *target;
+	} else if (opp) {
+		freq = dev_pm_opp_get_freq(opp);
+	} else {
+		WARN_ON(1);
+		return -EINVAL;
+	}
+
+	pm_runtime_get_noresume(dev);
+
+	if (!pm_runtime_suspended(dev)) {
+		ret = clk_set_rate(ptdev->clks.core, freq);
+		if (ret)
+			dev_err(dev, "failed to set clock rate: %lu\n", freq);
+	}
+
+	pm_runtime_put_noidle(dev);
+
+	return ret;
+}
+
 int panthor_devfreq_init(struct panthor_device *ptdev)
 {
 	/* There's actually 2 regulators (mali and sram), but the OPP core only
@@ -131,6 +167,11 @@ int panthor_devfreq_init(struct panthor_device *ptdev)
 	 * the coupling logic deal with voltage updates.
 	 */
 	static const char * const reg_names[] = { "mali", NULL };
+	static const char * const clk_names[] = { "core", NULL };
+	struct dev_pm_opp_config config = {
+		.clk_names = clk_names,
+		.config_clks = panthor_devfreq_config_clks,
+	};
 	struct thermal_cooling_device *cooling;
 	struct device *dev = ptdev->base.dev;
 	struct panthor_devfreq *pdevfreq;
@@ -153,6 +194,10 @@ int panthor_devfreq_init(struct panthor_device *ptdev)
 		return ret;
 	}
 
+	ret = devm_pm_opp_set_config(dev, &config);
+	if (ret)
+		return ret;
+
 	ret = devm_pm_opp_of_add_table(dev);
 	if (ret)
 		return ret;

drivers/gpu/drm/panthor/panthor_device.c

@@ -60,6 +60,12 @@ static int panthor_clk_init(struct panthor_device *ptdev)
 				     PTR_ERR(ptdev->clks.coregroup),
 				     "get 'coregroup' clock failed");
 
+	ptdev->clks.bus = devm_clk_get_optional(ptdev->base.dev, "bus");
+	if (IS_ERR(ptdev->clks.bus))
+		return dev_err_probe(ptdev->base.dev,
+				     PTR_ERR(ptdev->clks.bus),
+				     "get 'bus' clock failed");
+
 	drm_info(&ptdev->base, "clock rate = %lu\n", clk_get_rate(ptdev->clks.core));
 	return 0;
 }
@@ -462,10 +468,14 @@ int panthor_device_resume(struct device *dev)
 
 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_RESUMING);
 
-	ret = clk_prepare_enable(ptdev->clks.core);
+	ret = clk_prepare_enable(ptdev->clks.bus);
 	if (ret)
 		goto err_set_suspended;
 
+	ret = clk_prepare_enable(ptdev->clks.core);
+	if (ret)
+		goto err_disable_bus_clk;
+
 	ret = clk_prepare_enable(ptdev->clks.stacks);
 	if (ret)
 		goto err_disable_core_clk;
@@ -524,6 +534,9 @@ int panthor_device_resume(struct device *dev)
 err_disable_core_clk:
 	clk_disable_unprepare(ptdev->clks.core);
 
+err_disable_bus_clk:
+	clk_disable_unprepare(ptdev->clks.bus);
+
 err_set_suspended:
 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
 	atomic_set(&ptdev->pm.recovery_needed, 1);
@@ -570,6 +583,7 @@ int panthor_device_suspend(struct device *dev)
 	clk_disable_unprepare(ptdev->clks.coregroup);
 	clk_disable_unprepare(ptdev->clks.stacks);
 	clk_disable_unprepare(ptdev->clks.core);
+	clk_disable_unprepare(ptdev->clks.bus);
 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
 	return 0;
 }

drivers/gpu/drm/panthor/panthor_device.h

@@ -101,6 +101,9 @@ struct panthor_device {
 
 	/** @clks: GPU clocks. */
 	struct {
+		/** @bus: Bus clock. This clock is optional. */
+		struct clk *bus;
+
 		/** @core: Core clock. */
 		struct clk *core;