Add conv_bwd_weight illegal-memory-access debugging example (#227)#227
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Pull request overview
Adds a new CUTracer case-study example demonstrating how to localize a Blackwell (sm100) convolution backward-weight illegal memory access down to a single SASS instruction, using CUTracer traces and excerpts.
Changes:
- Add
examples/conv_bwd_weight_ima/with a standalone torch+triton reproducer kernel for the failing autotune config. - Add a walkthrough README plus sample
mem_addr_trace/reg_trace/ PTX-vs-SASS excerpts used to pinpoint the root cause. - Include captured trace excerpts that illustrate the per-lane OOB addresses and their register provenance.
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Show a summary per file
| File | Description |
|---|---|
| examples/conv_bwd_weight_ima/README.md | Walkthrough and reproduction steps for the IMA debugging workflow |
| examples/conv_bwd_weight_ima/mini_repro_bwd_weight.py | Standalone torch+triton reproducer kernel |
| examples/conv_bwd_weight_ima/example_mem_addr_excerpt.txt | Sample mem_addr_trace excerpt showing per-lane addresses at the faulting PC |
| examples/conv_bwd_weight_ima/example_reg_trace_excerpt.txt | Sample reg_trace excerpt tracing the bad address back to registers |
| examples/conv_bwd_weight_ima/example_ptx_vs_sass.txt | PTX masking vs miscompiled SASS excerpt illustrating the suspected ptxas issue |
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| ```bash | ||
| buck2 run //triton/tools/CUTracer:cutracer -c fbcode.nvcc_arch=b200a -- trace \ | ||
| --instrument mem_addr_trace \ | ||
| --kernel-filters triton_convolution2d_bwd_weight \ | ||
| --output-dir /tmp/ct_mem \ | ||
| -- python mini_repro_bwd_weight.py | ||
| ``` | ||
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| Trace the bad address back to its source registers (`reg_trace`): | ||
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| ```bash | ||
| buck2 run //triton/tools/CUTracer:cutracer -c fbcode.nvcc_arch=b200a -- trace \ | ||
| --instrument reg_trace \ | ||
| --kernel-filters triton_convolution2d_bwd_weight \ | ||
| --output-dir /tmp/ct_reg \ | ||
| -- python mini_repro_bwd_weight.py | ||
| ``` |
| dY = torch.randn(2, 4, 18, 18, device=dev) # grad_output | ||
| out = torch.zeros(4, 3, 1, 1, device=dev) # grad_weight (OUT_C, IN_C, 1, 1) | ||
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| grid = (1, 1, 1) # ceil(3/512), ceil(4/16), GROUPS |
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Summary: Adds examples/conv_bwd_weight_ima/, a CUTracer case study for root-causing a GPU illegal memory access down to a single SASS instruction. The example distills pytorch/pytorch#187081: a TorchInductor-generated Triton kernel (triton_convolution2d_bwd_weight) reads ~17 GB out of bounds on Blackwell (sm100). It demonstrates a CUTracer workflow that is useful even though CUTracer forces managed memory and so does not hard-crash: mem_addr_trace captures the per-lane out-of-bounds addresses at the faulting load, and reg_trace traces that address back to its source registers, pinning the bug on ptxas (the PTX masks the cp.async load via src-size=0; ptxas lowers it to a predicated LDGSTS that still dereferences the OOB address). DISABLE_PTXAS_OPT=1 on the same PTX yields 0 sanitizer errors. Contents: a standalone torch+triton reproducer plus sample mem_addr_trace / reg_trace / PTX-vs-SASS excerpts and a README. Authored with the assistance of an AI coding agent. Differential Revision: D108450044
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Summary: Adds examples/conv_bwd_weight_ima/, a CUTracer case study for root-causing a GPU illegal memory access down to a single SASS instruction. The example distills pytorch/pytorch#187081: a TorchInductor-generated Triton kernel (triton_convolution2d_bwd_weight) reads ~17 GB out of bounds on Blackwell (sm100). It demonstrates a CUTracer workflow that is useful even though CUTracer forces managed memory and so does not hard-crash: mem_addr_trace captures the per-lane out-of-bounds addresses at the faulting load, and reg_trace traces that address back to its source registers, pinning the bug on ptxas (the PTX masks the cp.async load via src-size=0; ptxas lowers it to a predicated LDGSTS that still dereferences the OOB address). DISABLE_PTXAS_OPT=1 on the same PTX yields 0 sanitizer errors. Contents: a standalone torch+triton reproducer plus sample mem_addr_trace / reg_trace / PTX-vs-SASS excerpts and a README. Authored with the assistance of an AI coding agent. Reviewed By: warrendeng Differential Revision: D108450044
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Summary:
Adds examples/conv_bwd_weight_ima/, a CUTracer case study for root-causing a
GPU illegal memory access down to a single SASS instruction.
The example distills pytorch/pytorch#187081: a TorchInductor-generated Triton
kernel (triton_convolution2d_bwd_weight) reads ~17 GB out of bounds on
Blackwell (sm100). It demonstrates a CUTracer workflow that is useful even
though CUTracer forces managed memory and so does not hard-crash: mem_addr_trace
captures the per-lane out-of-bounds addresses at the faulting load, and
reg_trace traces that address back to its source registers, pinning the bug on
ptxas (the PTX masks the cp.async load via src-size=0; ptxas lowers it to a
predicated LDGSTS that still dereferences the OOB address). DISABLE_PTXAS_OPT=1
on the same PTX yields 0 sanitizer errors.
Contents: a standalone torch+triton reproducer plus sample mem_addr_trace /
reg_trace / PTX-vs-SASS excerpts and a README.
Authored with the assistance of an AI coding agent.
Reviewed By: warrendeng
Differential Revision: D108450044