Update Ghidra HEAD to commit 74d498f8d

[auto-updater]

⚠️ Manual Intervention Required

The following files were added or deleted and may require manual CMake configuration updates:

New Spec Files

Review if these files need manual CMake updates (.slaspec files are auto-generated; other types may need manual updates):

• Ghidra/Processors/68000/data/languages/CPU32.slaspec
• Ghidra/Processors/x86/data/languages/cmpccxadd.sinc
• Ghidra/Processors/x86/data/languages/rao.sinc

Instructions

• New C++ sources: Add to appropriate list in src/setup-ghidra-source.cmake
• Deleted C++ sources: Remove from src/setup-ghidra-source.cmake
• New spec files: Review if .slaspec files are auto-generated; other types may need manual updates
• Deleted spec files: Verify no longer referenced

---Changed files:

M	Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M	Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M	Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M	Ghidra/Features/Decompiler/src/decompile/cpp/space.hh
M	Ghidra/Features/Decompiler/src/decompile/cpp/translate.cc
M	Ghidra/Features/Decompiler/src/decompile/cpp/translate.hh
M	Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
M	Ghidra/Features/Decompiler/src/decompile/cpp/type.hh
M	Ghidra/Processors/68000/certification.manifest
M	Ghidra/Processors/68000/data/languages/68000.ldefs
M	Ghidra/Processors/68000/data/languages/68000.sinc
A	Ghidra/Processors/68000/data/languages/CPU32.slaspec
M	Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
M	Ghidra/Processors/HCS12/data/languages/HCS_HC12.sinc
M	Ghidra/Processors/x86/certification.manifest
M	Ghidra/Processors/x86/data/languages/avx.sinc
M	Ghidra/Processors/x86/data/languages/avx2.sinc
M	Ghidra/Processors/x86/data/languages/avx2_manual.sinc
M	Ghidra/Processors/x86/data/languages/avx512.sinc
M	Ghidra/Processors/x86/data/languages/avx512_manual.sinc
M	Ghidra/Processors/x86/data/languages/avx_manual.sinc
A	Ghidra/Processors/x86/data/languages/cmpccxadd.sinc
M	Ghidra/Processors/x86/data/languages/fma.sinc
M	Ghidra/Processors/x86/data/languages/ia.sinc
A	Ghidra/Processors/x86/data/languages/rao.sinc
M	Ghidra/Processors/x86/data/languages/sgx.sinc
M	Ghidra/Processors/x86/data/languages/x86-64.slaspec
M	Ghidra/Processors/x86/data/languages/x86.slaspec

Commit details:

[Commit 1/8]
Hash: 6dd07f90ffcfc4136005e5e6c439b76f572bfdd8
Date: 2026-06-08 21:37:27 +0000
Message: GP-6936 Support for wrapped memory ranges

Files changed:
  M	Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
  M	Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
  M	Ghidra/Features/Decompiler/src/decompile/cpp/space.hh
  M	Ghidra/Features/Decompiler/src/decompile/cpp/translate.cc
  M	Ghidra/Features/Decompiler/src/decompile/cpp/translate.hh
  M	Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
  M	Ghidra/Features/Decompiler/src/decompile/cpp/type.hh

[Commit 2/8]
Hash: 70b7ec590ad646ebe767e099a88309fad37035cc
Date: 2026-06-10 07:25:22 -0400
Message: GP-6061: Implemented several x86 AVX instructions

Files changed:
  M	Ghidra/Processors/x86/data/languages/avx.sinc
  M	Ghidra/Processors/x86/data/languages/avx2.sinc
  M	Ghidra/Processors/x86/data/languages/avx2_manual.sinc
  M	Ghidra/Processors/x86/data/languages/avx512.sinc
  M	Ghidra/Processors/x86/data/languages/avx512_manual.sinc
  M	Ghidra/Processors/x86/data/languages/avx_manual.sinc
  M	Ghidra/Processors/x86/data/languages/fma.sinc

[Commit 3/8]
Hash: a3167f7bd774f6482e193dcffebf72d6adccf1bf
Date: 2026-06-09 15:53:44 +0000
Message: GP-0: Refactor x86 jcc bh change to reduce impact on existing code

Files changed:
  M	Ghidra/Processors/x86/data/languages/ia.sinc

[Commit 4/8]
Hash: 21a825a05d7a24848a36758861898abaad9a1ca5
Date: 2026-06-08 15:11:29 -0400
Message: GP-6642: Corrected disassembly of HCS-H12 BRN instruction

Files changed:
  M	Ghidra/Processors/HCS12/data/languages/HCS_HC12.sinc

[Commit 5/8]
Hash: 2c3ca6df4cd24ca0d809a93450b78d9e7ff2ee7a
Date: 2026-06-08 15:10:05 -0400
Message: GP-5780: Added several missing x86 instructions

Files changed:
  M	Ghidra/Processors/x86/certification.manifest
  A	Ghidra/Processors/x86/data/languages/cmpccxadd.sinc
  M	Ghidra/Processors/x86/data/languages/ia.sinc
  A	Ghidra/Processors/x86/data/languages/rao.sinc
  M	Ghidra/Processors/x86/data/languages/sgx.sinc
  M	Ghidra/Processors/x86/data/languages/x86-64.slaspec
  M	Ghidra/Processors/x86/data/languages/x86.slaspec

[Commit 6/8]
Hash: 5194daa9e57a213f233ed122160a101a1131acce
Date: 2026-06-06 13:34:24 +0200
Message: ARM M-profile: fix mrsipsr ISR_NUMBER mask (0x1f -> 0x1ff)

Files changed:
  M	Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc

[Commit 7/8]
Hash: e02b069461b5795cad9df948c909965e8f9a15e3
Date: 2026-02-16 19:17:42 -0500
Message: Add OpenBSD support for x86_64 and arm_64.

Files changed:
  M	Ghidra/Features/Decompiler/src/decompile/cpp/Makefile

[Commit 8/8]
Hash: e50f27d6b683c7c781f78e296ec3d66f4f1637a6
Date: 2026-03-28 15:31:09 +0000
Message: #1244 Add CPU32 processor variant with full instruction set support
Details:
Add Motorola CPU32 processor variant to the 68000 processor module.
CPU32 is based on the 68020 with some instructions removed and table
lookup/interpolation instructions added. Used in MC68330, MC68340,
MC68360 and similar microcontrollers.

Changes:
- 68000.sinc: @ifdef/@ifndef CPU32 conditionals
  - Added: TBL instructions, LPSTOP, BGND
  - Excluded: BFxxx, CALLM, CAS, CAS2, PACK, RTM, UNPK
- CPU32.slaspec: new language specification
- 68000.ldefs: CPU32 variant definition
- certification.manifest: CPU32.slaspec entry
- Emulator test classes and pcode_defs.py configuration

All 79 CPU32 instructions verified against CPU32 Reference Manual
(Rev 1, Dec 1990). Pcode emulator tests pass: 16/16 O0, 16/16 O3.

Files changed:
  M	Ghidra/Processors/68000/certification.manifest
  M	Ghidra/Processors/68000/data/languages/68000.ldefs
  M	Ghidra/Processors/68000/data/languages/68000.sinc
  A	Ghidra/Processors/68000/data/languages/CPU32.slaspec