Skip to content
Change the repository type filter

All

    Repositories list

    • Mirror of tachyon-da cvc Verilog simulator
      C
      275541Updated Mar 16, 2026Mar 16, 2026
    • verilator

      Public
      Verilator open-source SystemVerilog simulator and lint system
      C++
      GNU Lesser General Public License v3.0
      880100Updated Sep 11, 2024Sep 11, 2024
    • connectal

      Public
      Connectal is a framework for software-driven hardware development.
      Bluespec
      MIT License
      49180281Updated Oct 16, 2023Oct 16, 2023
    • atomicc

      Public
      Generate Verilog from Atomicc IR files (which are generated from llvm-translate)
      Shell
      GNU General Public License v2.0
      1600Updated Mar 9, 2023Mar 9, 2023
    • fpgajtag

      Public
      A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.
      C
      143720Updated May 25, 2022May 25, 2022
    • fpgamake

      Public
      Generates Makefiles to synthesize, place, and route verilog using Vivado
      Tcl
      2310120Updated May 24, 2022May 24, 2022
    • Memoizes execution of build commands
      Python
      MIT License
      3310Updated May 24, 2022May 24, 2022
    • SystemVerilog
      MIT License
      0200Updated Jan 14, 2022Jan 14, 2022
    • The official Linux kernel from Xilinx
      C
      Other
      1.6k200Updated Oct 24, 2021Oct 24, 2021
    • bsvtokami

      Public
      Translates Bluespec SystemVerilog to Kami for use with the coq proof assistant.
      Python
      MIT License
      31100Updated Oct 13, 2021Oct 13, 2021
    • llvm runtime interpreter/translator
      Python
      3100Updated Dec 23, 2020Dec 23, 2020
    • clang

      Public
      Mirror of official clang git repository located at http://llvm.org/git/clang. Updated every five minutes.
      C++
      Other
      1.6k100Updated Dec 14, 2020Dec 14, 2020
    • llvm

      Public
      Branch of llvm repository. Use branch release_34atomicc1
      LLVM
      Other
      2.1k100Updated Dec 11, 2020Dec 11, 2020
    • A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.
      C++
      MIT License
      39000Updated Nov 11, 2020Nov 11, 2020
    • A tool to rewrite xilinx synthesized netlists back into non-LUT form (to manually verify elaboration)
      C++
      MIT License
      0100Updated Oct 9, 2020Oct 9, 2020
    • Verilog
      Apache License 2.0
      27000Updated Jul 22, 2020Jul 22, 2020
    • A fork of the main Verilator project for development work.
      C++
      GNU Lesser General Public License v3.0
      5000Updated Jul 22, 2020Jul 22, 2020
    • bsc

      Public
      Bluespec Compiler (BSC)
      Haskell
      Other
      184000Updated Jun 8, 2020Jun 8, 2020
    • doc

      Public
      Repository for publishing non-jekyll documentation
      MIT License
      0000Updated May 1, 2020May 1, 2020
    • A place to share libraries and utilities that don't belong in the core bsc repo
      Bluespec
      20100Updated Feb 22, 2020Feb 22, 2020
    • cudd

      Public
      CUDD: CU Decision Diagram package - unofficial git mirror of http://vlsi.colorado.edu/~fabio/
      C
      BSD 3-Clause "New" or "Revised" License
      75100Updated Jul 17, 2019Jul 17, 2019
    • tlaplus

      Public
      TLC is an explicit state model checker for specifications written in TLA+. The TLA+Toolbox is an IDE for TLA+.
      Java
      MIT License
      264000Updated May 16, 2019May 16, 2019
    • dumpNet

      Public
      C++
      MIT License
      0000Updated Feb 15, 2019Feb 15, 2019
    • C++ standards drafts
      TeX
      813000Updated Aug 13, 2018Aug 13, 2018
    • pciescan

      Public
      Makefile
      MIT License
      0010Updated May 29, 2018May 29, 2018
    • C
      MIT License
      0000Updated May 17, 2018May 17, 2018
    • NuSMV

      Public
      Mirror of NuSMV 2.6.0 from http://nusmv.fbk.eu
      C
      Other
      0000Updated Feb 20, 2018Feb 20, 2018
    • xbsv

      Public
      connectal (formerly called xbsv) contains a utility to generate bit files for Xilinx Zynq devices from BSV programs.
      10820Updated Jul 26, 2017Jul 26, 2017
    • openocd

      Public
      packaging branch of openocd
      GNU General Public License v2.0
      0100Updated Feb 10, 2017Feb 10, 2017
    • PYNQ

      Public
      Python Productivity for ZYNQ with Python board level designs
      Jupyter Notebook
      860100Updated Oct 7, 2016Oct 7, 2016
    ProTip! When viewing an organization's repositories, you can use the props. filter to filter by custom property.